IS61NP12836 Datasheet, PDF (15/20 Pages) Integrated Silicon Solution, Inc – PIPELINE NO WAIT STATE BUS SRAM

IS61NP12832 IS61NP12836 IS61NP25618
IS61NLP12832 IS61NLP12836 IS61NLP25618
ISSI ^®
WRITE CYCLE TIMING
Clock
ADV
tKH tKL
tKC
A16 - A0 or
A17 - A0
A1
A2
A3
WE
CKE
tSE tHE
CE
OE
Data In
Data Out
Q0-3
D1-1
tOEHZ
Q0-4
D2-1
D2-2
D2-3
NOTES: WE = L and BWX = L
CE = L means CE1 = L, CE2 = H and CE2 = L
CE = H means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L
D2-4
tDS
tDH
D3-1
D3-2
D3-3
D3-4
Don't Care
Undefined
Integrated Silicon Solution, Inc. — 1-800-379-4774
15
PRELIMINARY INFORMATION Rev. 00C
11/30/00