ISL6211 Datasheet, PDF (8/16 Pages) Intersil Corporation – Crusoe™ Processor Core-Voltage Regulator

ISL6211
also sets the PGOOD, UVP and OVP thresholds. The VID
pins can be left open to set logic 1 as they are pulled up to
the internal +2.5V voltage source by a 12µA current source.
TABLE 1.
VID4
PIN NAME
VID3
VID2
VID1
VID0
NOMINAL
OUT1
VOLTAGE
0
0
0
0
0
1.750
0
0
0
0
1
1.700
0
0
0
1
0
1.650
0
0
0
1
1
1.600
0
0
1
0
0
1.550
0
0
1
0
1
1.500
0
0
1
1
0
1.450
0
0
1
1
1
1.400
0
1
0
0
0
1.350
0
1
0
0
1
1.300
0
1
0
1
0
1.250
0
1
0
1
1
1.200
0
1
1
0
0
1.150
0
1
1
0
1
1.100
0
1
1
1
0
1.050
0
1
1
1
1
1.000
1
0
0
0
0
0.975
1
0
0
0
1
0.950
1
0
0
1
0
0.925
1
0
0
1
1
0.900
1
0
1
0
0
0.875
1
0
1
0
1
0.850
1
0
1
1
0
0.825
1
0
1
1
1
0.800
1
1
0
0
0
0.775
1
1
0
0
1
0.750
1
1
0
1
0
0.725
1
1
0
1
1
0.700
1
1
1
0
0
0.675
1
1
1
0
1
0.650
1
1
1
1
0
0.625
1
1
1
1
1
0.600
NOTE: 0 = connected to GND or V_SS, 1 = open or connected to Vcc
or voltage source of 2.5V...5.0 through pull-up resistors.
Alternative Voltage Programming Input
Alternatively to VID code programming, the output voltage
can be set by an ALTV pin. The necessity of such input is
dictated by the fact that during power-up and some power
saving modes of operation, the voltage on the processor is
insufficient to provide correct VID codes to the controller.
The required core voltage should be set by some means
external to the processor. One of the most common
approaches to this problem is to provide hard wired VID
code via multiplexer controlled by the CPU. Providing high
degree of flexibility, the approach lacks simplicity and takes
many external components and valuable motherboard area.
The ISL6211 uses the simpler way to set the core voltages
when the CPU is incapable of doing that.
The resistor-MOSFET network is connected to the ALTV pin
as it is shown on Simplified Power Diagram and in the
Figure 2. The calibrated current source of 10µA from ALTV
pin creates the voltage drop on the resistor when the
MOSFET conducts being activated by the input logic signal,
for example DSX. The controller regulates the output voltage
to the level established on the ALTV pin when this voltage is
lower than the highest VID programmed voltage (1.75V).
When the MOSFET in series with the resistor is turned off by
the gate signal, the ALTV pin voltage rises to VCC signaling
the chip that DSX signal is de-asserted. This high level
signal commands the controller to regulate the output
voltage to the level programmed by the VID code. This
programming technique relies on the tolerance of the
internal pull-up current and provides +/-5% accuracy of the
voltage set.
Q1
START
R1
Q2
DSX
10µA
6
ALTV
R2
ISL6211
FIGURE 2. CIRCUIT FOR MORE PRECISE PROGRAMMING
OF START AND DSX VOLTAGES
VREF
Q1
START
R1
R2
Q2
DSX
ALTV
6
R3
ISL6211
FIGURE 3. CIRCUIT FOR MORE PRECISE PROGRAMMING
OF START AND DSX VOLTAGES
If a better accuracy is required, the circuit shown in the
Figure 3 can be used instead. With this approach the set
point accuracy depends mainly on the tolerance of an
external reference voltage source.
R2 = ----------------------^V----^S----^T----^A----^R----^T-----^•----^R-----¹-----------------------
V_REF – V_START + R1 • 10µA
8