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ISL6211 Datasheet, PDF (10/16 Pages) Intersil Corporation – Crusoe™ Processor Core-Voltage Regulator
ISL6211
In nominal load currents the synchronous buck converter
operates in continuous conduction mode. Continuous
conduction mode is also sustained during all upward and
downward transitions commanded by either VID code
change, or during transitions from alternatively programmed
voltage to VID code set voltage, or vice versa. This mode of
operation achieves higher efficiency due to the substantially
lower voltage drop across the MOSFET compared to a
Shottky diode. In contrast, continuous-conduction operation
in load currents lower than the inductor critical value results
in lower efficiency. In this case, during a fraction of a
switching cycle, the direction of the inductor current changes
to the opposite actively discharging the output filter
capacitor. To maintain the output voltage in regulation, this
voltage should be restored during the consequent cycle of
operation by the cost of increased circulating current and
losses associated with it.
The critical value of the inductor current can be estimated by
the following expression.
IHYS
=
----(---V----I--N-----–-----V----O----)----•----V-----O------
2 • FSW • LO • VIN
To improve converter efficiency in loads lower than critical,
the switch-over to variable frequency hysteretic operation
with diode emulation is implemented into the PWM scheme.
The switch-over is provided automatically by the mode
control circuit that constantly monitors the inductor current
and alters the way the PWM signal is generated.
The voltage across the synchronous MOSFET at the
moment of time just before the upper-MOSFET turns on is
monitored for purposes of mode change. When the
converter operates in currents higher than critical, this
voltage is always positive as shown in the Figures 8, 9. In
currents lower than critical, the voltage is always negative.
The mode control circuit uses a sign of voltage across the
synchronous devices to determine if the load current is
higher or lower than the critical value.
To prevent chatter between operating modes, the circuit
looks for eight sequential matching sign signals before it
makes its decision to perform a mode change. The same
algorithm is true for both CCM-hysteretic and hysteretic-
CCM transitions.
VOUT
t
IIND
t
PHASE
COMP
1 2 345 6 7 8
t
MODE
OF
OPERATION
PWM
HYSTERETIC
t
FIGURE 8. CCM -- HYSTERETIC TRANSITION
VOUT
t
IIND
1 2 3 45 6 7 8
t
PHASE
COMP
t
MODE
OF
OPERATION
HYSTERETIC
PWM
t
FIGURE 9. HYSTERETIC - CCM TRANSITION
Hysteretic Operation
When the critical inductor current is detected, the IC enters
hysteretic mode. The PWM comparator and the error
amplifier that provided control in the CCM mode are inhibited
and the hysteretic comparator is now activated. A change is
also made to the gate logic. In hysteretic mode the
synchronous rectifier MOSFET is controlled in diode
emulation mode, hence conduction in the second quadrant
is prohibited.
The hysteretic comparator initiates the PWM signal when the
output voltage gets below the lower threshold and
terminates the PWM signal when the output voltage rises
over the upper threshold. A spread or hysteresis between
these two thresholds determines the switching frequency
and the peak value of the inductor current. A transition to a
constant frequency CCM mode will happen when the load
current gets to a level higher than the critical:
ICCM ≈ 2---∆--•--V---E-h---S-y---s-R--
Where, ∆Vhys= 15mV, is a hysteretic comparator window,
ESR is the equivalent series resistance of the output
capacitor.
Because of different control mechanisms, the value of the
load current where transition into CCM operation takes place
10