ISL6211 Datasheet, PDF (4/16 Pages) Intersil Corporation – Crusoe™ Processor Core-Voltage Regulator

ISL6211
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
ALTV to VID Transition Voltage
ENABLE
V_AVTH
1.71 1.75 1.78
V
Enable Voltage Low
Enable Voltage High
PWM CONVERTER
V_ENLOW IC Inhibited
V_ENHIGH IC Enabled
-
-
1.2
V
2.0
-
-
V
Output Voltage
VOUT1 Defined by the VID code (Table 1) or ALTV pin 0.6
-
1.75
V
Under-Voltage Shut-Down Level
V_UV1
Percent of the voltage set by VID code or
ALTV pin
72
75
78
%
Disabled during dynamic VID code change
Under-Voltage Shut Down Delay
Over-Voltage Threshold
Over-Voltage Protection Delay
ERROR AMPLIFIER
T_DOC1
V_OVP1
T_DOV1
By design
By design
1.2
-
1.6
µs
1.90 1.95 2.00
V
1.6
-
3.2
µs
DC Gain
By design
-
86
-
dB
Gain-Bandwidth Product
GBWP By design
-
2.7
-
MHz
Slew Rate
SR
By design
-
1
-
V/µs
GATE DRIVERS
Upper Drive Pull-Up Resistance
Upper Drive Pull-Down Resistance
R_1UGPUP
R1UGPDN
-
3.8
5
Ω
-
1.6
3
Ω
Lower Drive Pull-Up Resistance
Lower Drive Pull-Down Resistance
POWER GOOD
R_1LGPUP
R_1LGPDN
-
3.8
5
Ω
-
0.8
1.5
Ω
V_OUT Upper Threshold
V_OUT Lower Threshold, Falling Edge
V_OUT Lower Threshold, Rising Edge
PGOOD Voltage Low
PGOOD Leakage Current
Percent of the voltage defined by the VID code 123
-
127
%
Percent of the voltage defined by the VID code 77
-
81
%
Percent of the voltage defined by the VID code 87
-
94
%
V_PGOOD I_PGOOD = -4mA
I_PGlLKG V_PULLUP = 5.0V
-
-
0.5
V
-
-
1
µA
4