ISL12020MIRZ-T7A Datasheet, PDF (8/34 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12020M
I²C Interface Specifications Test Conditions: VDD = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
(Note 8) TYP (Note 9) (Note 8)
UNITS
NOTES
t_HD:STA
t_SU:DAT
t_HD:DAT
t_SU:STO
t_HD:STO
t_DH
t_R
t_F
Cb
START Condition Hold Time
From SDA falling edge
600
crossing 30% of V_DD to SCL
falling edge crossing 70% of
V_DD.
Input Data Setup Time
From SDA exiting the 30% to
100
70% of V_DD window, to SCL
rising edge crossing 30% of
V_DD.
Input Data Hold Time
From SCL falling edge
20
crossing 30% of V_DD to SDA
entering the 30% to 70% of
V_DD window.
STOP Condition Setup Time
From SCL rising edge
600
crossing 70% of V_DD, to SDA
rising edge crossing 30% of
V_DD.
STOP Condition Hold Time
From SDA rising edge to SCL
600
falling edge. Both crossing
70% of V_DD.
Output Data Hold Time
From SCL falling edge
0
crossing 30% of V_DD, until
SDA enters the 30% to 70%
of V_DD window.
SDA and SCL Rise Time
From 30% to 70% of V_DD. 20 + 0.1 x Cb
SDA and SCL Fall Time
From 70% to 30% of V_DD. 20 + 0.1 x Cb
Capacitive Loading of SDA or SCL Total on-chip and off-chip
10
ns
ns
900
ns
ns
ns
ns
300
ns
16
300
ns
16
400
pF
16
R_PU
SDA and SCL Bus Pull-up Resistor Maximum is determined by
1
Off-chip
t_R and t_F.
For Cb = 400pF, max is
about 2k~2.5k.
For Cb = 40pF, max is about
15k~20k
k
16
NOTES:
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
9. Specified at +25°C.
10. Minimum V_DD and/or V_BAT of 1V to sustain the SRAM. The value is based on characterization and it is not tested.
11. Temperature Conversion is inactive below V_BAT = 2.7V. Device operation is not guaranteed at VBAT<1.8V.
12. IRQ/F_OUT Inactive.
13. V_DD > V_{BAT +}V_BATHYS
14. In order to ensure proper timekeeping, the V_{DD SR-} specification must be followed.
15. Limits should be considered typical and are not production tested.
16. These are I²C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate
specification.
17. To avoid EEPROM recall issues, it is advised to use this minimum power up slew rate. Not tested, shown as typical only.
8
FN6667.5
December 13, 2011