ISL12020MIRZ-T7A Datasheet, PDF (21/34 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12020M
FREQUENCY OF TEMPERATURE SENSING AND
CORRECTION BIT (BTSR)
This bit controls the frequency of Temp Sensing and Correction.
BTSR = 0 default mode is every 10 minutes, BTSR = 1 is every
1.0 minute. Note that BTSE has to be enabled in both cases. See
Table 16.
The temperature measurement conversion time is the same for
battery mode as for V_DD mode, approximately 22ms. The battery
mode current will increase during this conversion time to
typically 68µA. The average increase in battery current is much
lower than this due to the small duty cycle of the ON-time versus
OFF-time for the conversion.
To figure the average increase in battery current, we take the
change in current times the duty cycle. For the 1 minute
temperature period the average current is as shown in
Equation 1:
I_BAT
=
0_----._--0_---2_---2_----s_-
60 s

68  A =
250 n A
(EQ. 1)
For the 10 minute temperature period the average current is as
shown in Equation 2:
I_BAT
=
0_----._--0_---2_---2_----s_-
600 s

68  A =
25 n A
(EQ. 2)
If the application has a stable temperature environment that
doesn’t change quickly, the 10 minute option will work well and
the backup battery lifetime impact is minimized. If quick
temperature variations are expected (multiple cycles of more
than 10° within an hour), then the 1 minute option should be
considered and the slightly higher battery current figured into
overall battery life.
TABLE 16. FREQUENCY OF TEMPERATURE SENSING AND
CORRECTION BIT
BTSE
BTSR
TC PERIOD IN
BATTERY MODE
0
0
OFF
0
1
OFF
1
0
10 Minutes
1
1
1 Minute
GAIN FACTOR OF AT BIT (BETA<4:0>)
Beta is specified to take care of the Cm variations of the crystal.
Most crystals specify Cm around 2.2fF. For example, if Cm > 2.2fF,
the actual AT steps may reduce from 1ppm/step to approximately
0.80ppm/step. Beta is then used to adjust for this variation and
restore the step size to 1ppm/step.
BETA values are limited in the range from 01000 to 11111 as
shown in Table 17. To use Table 17, the device is tested at two AT
settings in Equation 3:
BETA VALUES = ATmax – ATmin/63
(EQ. 3)
where:
AT(max) = F_OUT in ppm (at AT = 00H) and
AT(min) = F_OUT in ppm (at AT = 3FH).
The BETA VALUES result is indexed in the right hand column and
the resulting Beta factor (for the register) is in the same row in
the left column.
The ISL12020M has a preset BETA value corresponding to the
crystal in the module. This value is recalled on initial power-up
and should never be changed for best temperature
compensation performance, although the user may override this
preset value if so desired.
The value for BETA should only be changed while the TSE (Temp
Sense Enable) bit is “0”. The procedure for writing the BETA
register involves two steps. First, write the new value of BETA with
TSE = 0. Then write the same value of BETA with TSE = 1. This will
insure the next temp sense cycle will use the new BETA value.
TABLE 17. BETA VALUES
BETA<4:0>
AT STEP ADJUSTMENT
01000
0.5000
00111
0.5625
00110
0.6250
00101
0.6875
00100
0.7500
00011
0.8125
00010
0.8750
00001
0.9375
00000
1.0000
10000
1.0625
10001
1.1250
10010
1.1875
10011
1.2500
10100
1.3125
10101
1.3750
10110
1.4375
10111
1.5000
11000
1.5625
11001
1.6250
11010
1.6875
11011
1.7500
11100
1.8125
11101
1.8750
11110
1.9375
11111
2.0000
Final Analog Trimming Register (FATR)
This register shows the final setting of AT after temperature
correction. It is read-only; the user cannot overwrite a value to this
register. This value is accessible as a means of monitoring the
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FN6667.5
December 13, 2011