ISL12020MIRZ-T7A Datasheet, PDF (31/34 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12020M
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
CHANGE
10/28/11
FN6667.5
On page 1, corrected Figure 1, Typical Application Circuit to show that pin 6/15 are not connected to ground.
On page 2, Ordering Information, added ISL12020MIRZ-EVALZ evaluation board.
On page 3, Pin Descriptions, added Ground pin row, separated VDD pin. Bolded No Connection for the Thermal
Pad.
On page 6, Absolute Maximum Ratings, added shock, vibration.
On page 6, for IDD1 at 3V/5V limits, changed MAX from 7/6µA to 15/14µA.
On page 7, added V_DDSR+ as typical, with Note 17.
On page 8, added Note 17 for V_DDSR+
On page 16, under Oscillator Fail Bit, changed text to: “Oscillator Fail Bit indicates that the oscillator has failed.
The oscillator frequency is either zero or very far from the desired 32.768kHz due to failure, PC board
contamination or mechanical issues.”
On page 16, under Daylight Savings Time Change Bit, removed “DSTADJ can be set to “1” for instances where
the RTC device is initialized during the DST Forward period.” Added “It is read-only and cannot be written. Setting
time during a DST forward period will not set this bit to “1”.”
On page 22, Table 19, changed FDTR column head from <2:0> to <4:0>.
On page 22, Tables 20 and 21, corrected addresses.
On page 28, added Power Supply Considerations section.
4/23/10
Added “Latch Up (Tested per JESD-78B; Class 2, Level A) 100mA or 1.5 * VMAX Input” on page 6
Added “Maximum Junction Temperature +85°C” on page 6
Added “” on page 1
Added “Thermal Pad” description to “Pin Descriptions” on page 3. Added “Thermal Pad” label to “Pin
Configuration” on page 2.
Added cross references to page numbers in “Revision History”.
Updated Package Outline Drawing on page 34 to most recent revision. Changes were as follows:
Revised note 8 from:
"Soldering required to PCB for X1 and X2 pads each on a separate floating metal (GRN)."
to:
"Soldering required to PCB for X1 and X2 pads to separate and non-connected metal pads."
Changed Note 2 from:
"These Intersil plastic packaged products employ special material sets, molding compounds and 100% matte
tin plate plus anneal (e3) termination finish. These products do contain Pb but they are RoHS compliant by
exemption 7 (lead in high melt temp solder for internal connections) and exemption 5 (lead in piezoelectric
elements).."
to:
"These Intersil plastic packaged products employ special material sets, molding compounds and 100% matte
tin plate plus anneal (e3) termination finish. These products do contain Pb but they are RoHS compliant by
exemption 7 (lead in high melting temp solder and in piezoelectronic devices) and exemption 5 (lead in glass
of electronic components).."
31
FN6667.5
December 13, 2011