ISL12020MIRZ-T7A Datasheet, PDF (28/34 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12020M
SIGNALS
FROM THE
MASTER
S
T _{IDENTIFICATION}
A
BYTE WITH
R
R/W = 0
T
ADDRESS
BYTE
S
T
A
R
T
IDENTIFICATION
BYTE WITH
R/W = 1
A
A
C
C
K
K
S
T
O
P
SIGNAL AT
SDA
11011110
A
SIGNALS FROM
C
THE SLAVE
K
11011111
A
A
C
K
C
K
FIRST READ
DATA BYTE
LAST READ
DATA BYTE
FIGURE 20. READ SEQUENCE (CSR SLAVE ADDRESS SHOWN)
Application Section
Power Supply Considerations
The ISL12022M contains programmed EEPROM registers which
are recalled to volatile RAM registers during initial powerup.
These registers contain DC voltage, frequency and temperature
calibration settings. Initial powerup can be either application of
V_BAT or V_DD power, whichever is first. It is important that the
initial powerup meet the power supply slew rate specification to
avoid faulty EEPROM powerup recall. Also, any glitches or low
voltage DC pauses should be avoided, as these may activate
recall at a low voltage and load erroneous data into the
calibration registers. Note that a very slow Vdd ramp rate
(outside data sheet limits) will almost always trigger erroneous
recall and should be avoided entirely.
Battery-Backup Details
The ISL12020M has automatic switchover to battery-backup
when the V_DD drops below the VBAT mode threshold. A wide
variety of backup sources can be used, including standard and
rechargeable lithium, Super Capacitors, or regulated secondary
sources. The serial interface is disabled in battery-backup, while
the oscillator and RTC registers are operational. The SRAM
register contents are powered to preserve their contents as well.
.
V_DD = 2.7V
TO 5.5V
C_IN
0.1µF
ISL12020M
VDD VBAT
J_BAT
GND
D_BAT
BAT43W
C_BAT
0.1µF
+ _{VBAT = 1.8V}
TO 3.2V
FIGURE 21. SUGGESTED BATTERY-BACKUP CIRCUIT
The V_DD negative slew rate should be limited to below the data
sheet spec (10V/ms) otherwise battery switchover can be
delayed, resulting in SRAM contents corruption and oscillator
operation interruption.
Some applications will require separate supplies for the RTC V_DD
and the I²C pullups. This is not advised, as it may compromise
the operation of the I²C bus. For applications that do require
serial bus communication with the RTC V_DD powered down, the
SDA pin must be pulled low during the time the RTC V_DD ramps
down to 0V. Otherwise, the device may lose serial bus
communications once V_DD is powered up, and will return to
normal operation ONLY once V_DD and V_BAT are both powered
down together.
Layout Considerations
The input voltage range for VBAT is 1.8V to 5.5V, but keep in
mind the temperature compensation only operates for V_BAT >
2.7V. Note that the device is not guaranteed to operate with a
V_BAT < 1.8V, so the battery should be changed before
discharging to that level. It is strongly advised to monitor the low
battery indicators in the status registers and take action to
replace discharged batteries.
If a Super Capacitor is used, it is possible that it may discharge to
below 1.8V during prolonged power-down. Once powered up, the
device may lose serial bus communications until both V_DD and
V_BAT are powered down together. To avoid that situation,
including situations where a battery may discharge deeply, the
circuit in Figure 21 can be used.
The ISL12020M contains a quarts crystal and requires special
handling during PC board assembly. Excessive shock and vibrations
should be avoided. Ultrasound cleaning is not advisable. See Note 7
on page 6 in the electrical specifications table pertaining to solder
reflow effects on oscillator accuracy.
The crystal pins X1 and X2 have a very high impedance, and
oscillator circuits operating at low frequencies (such as 32.768kHz)
are known to pick up noise very easily if layout precautions are not
followed. Most instances of erratic clocking or large accuracy errors
can be traced to the susceptibility of the oscillator circuit to
interference from adjacent high speed clock or data lines. Careful
layout of the RTC circuit will avoid noise pickup and insure accurate
clocking.
The diode, D_BAT will add a small drop to the battery voltage but
will protect the circuit should battery voltage drop below 1.8V.
The jumper is added as a safeguard should the battery ever need
to be disconnect from the circuit.
Figure 22 shows a suggested layout for the ISL12020M device.
Three main precautions should be followed:
1. Do not run the serial bus lines or any high speed logic lines in
the vicinity of the X1 and X2 pins. These logic level lines can
induce noise in the oscillator circuit, causing misclocking.
28
FN6667.5
December 13, 2011