X40430_06 Datasheet, PDF (7/26 Pages) Intersil Corporation – Triple Voltage Monitor with Integrated CPU Supervisor

X40430, X40431, X40434, X40435
PRINCIPLES OF OPERATION
Power-on Reset
Applying power to the X40430, X40431, X40434,
X40435 activates a Power-on Reset Circuit that pulls
the RESET/RESET pins active. This signal provides
several benefits.
– It prevents the system microprocessor from starting
to operate with insufficient voltage.
– It prevents the processor from operating prior to sta-
bilization of the oscillator.
– It allows time for an FPGA to download its configura-
tion prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power-up.
When V_CC exceeds the device V_TRIP1 threshold value
for t_PURST (selectable) the circuit releases the RESET
(X40431, X40435) and RESET (X40430, X40434) pin
allowing the system to begin operation.
Figure 1. Connecting a Manual Reset Push-Button
X40430, X40434
V_CC
System
Reset
RESET
MR
Manual
Reset
Manual Reset
By connecting a push-button directly from MR to ground,
the designer adds manual system reset capability. The
MR pin is LOW while the push-button is closed and
RESET/RESET pin remains HIGH/LOW until the push-
button is released and for t_PURST thereafter.
Low Voltage V_CC (V1 Monitoring)
During operation, the X40430, X40431, X40434,
X40435 monitors the V_CC level and asserts
RESET/RESET if supply voltage falls below a preset
minimum V_TRIP1. The RESET/RESET signal prevents
the microprocessor from operating in a power fail or
brownout condition. The RESET/RESET signal remains
active until the voltage drops below 1V. It also remains
active until V_CC returns and exceeds V_TRIP1 for t_PURST.
Low Voltage V2 Monitoring
The X40430 also monitors a second voltage level and
asserts V2FAIL if the voltage falls below a preset mini-
mum V_TRIP2. The V2FAIL signal is either ORed with
RESET to prevent the microprocessor from operating
in a power fail or brownout condition or used to inter-
rupt the microprocessor with notification of an impend-
ing power failure.
For the X40430 and X40431 the V2FAIL signal
remains active until the V2MON drops below 1V
(V2MON falling). It also remains active until V2MON
returns and exceeds V_TRIP2. This voltage sense cir-
cuitry monitors the power supply connected to V2MON
pin. If V_CC = 0, V2MON can still be monitored.
For the X40434 and X40435, the V2FAIL signal
remains active until V_CC drops below 1V and remains
active until V2MON returns and exceeds V_TRIP2. This
sense circuitry is powered by V_CC. If V_CC = 0, V2MON
cannot be monitored.
Low Voltage V3 Monitoring
The X40430, X40431, X40434, X40435 also monitors
a third voltage level and asserts V3FAIL if the voltage
falls below a preset minimum V_TRIP3. The V3FAIL sig-
nal is either ORed with RESET to prevent the micro-
processor from operating in a power fail or brownout
condition or used to interrupt the microprocessor with
notification of an impending power failure. The V3FAIL
signal remains active until the V3MON drops below 1V
(V3MON falling). It also remains active until V3MON
returns and exceeds V_TRIP3.
This voltage sense circuitry monitors the power supply
connected to V3MON pin. If V_CC = 0, V3MON can still
be monitored.
Early Low V_CC Detection (LOWLINE)
This CMOS output goes LOW earlier than
RESET/RESET whenever V_CC falls below the V_TRIP1
voltage and returns high when V_CC exceeds the
V_TRIP1 voltage. There is no power-up delay circuitry
(t_PURST) on this pin.
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FN8251.1
May 24, 2006