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X5323S8IZT1 Datasheet, PDF (6/20 Pages) Intersil Corporation – CPU Supervisor with 32kBit SPI EEPROM
X5323, X5325
NEW VCC APPLIED =
OLD VCC APPLIED + ERROR
VTRIP PROGRAMMING
EXECUTE
RESET VTRIP
SEQUENCE
SET VCC = VCC APPLIED =
DESIRED VTRIP
EXECUTE
SET VTRIP
SEQUENCE
APPLY 5V TO VCC
DECREMENT VCC
(VCC = VCC - 10mV)
NEW VCC APPLIED =
OLD VCC APPLIED - ERROR
EXECUTE
RESET VTRIP
SEQUENCE
NO
RESET PIN
GOES ACTIVE?
YES
ERROR ≤ EMAX
MEASURED VTRIP -
DESIRED VTRIP
ERROR ≥ EMAX
EMAX = MAXIMUM DESIRED ERROR
ERROR < EMAX
DONE
FIGURE 3. VTRIP PROGRAMMING SEQUENCE FLOW CHART
VTRIP
ADJ.
4.7kΩ
NC
+
PROGRAM
1
8
2 X5323, 7
3 X5325 6
4
5
10kΩ
10kΩ
FIGURE 4. SAMPLE VTRIP RESET CIRCUIT
6
VP
NC
4.7kΩ
RESET
NC
RESET VTRIP
TEST VTRIP
SET VTRIP
FN8131.2
June 30, 2008