X5323S8IZT1 Datasheet, PDF (12/20 Pages) Intersil Corporation – CPU Supervisor with 32kBit SPI EEPROM

X5323, X5325
Equivalent AC Load Circuit at 5V V_CC
5V
5V
2.06kΩ
4.6kΩ
AC Test Conditions
Input pulse levels
Input rise and fall times
Input and output timing level
OUTPUT
3.03kΩ
RESET/RESET
100pF
30pF
V_CC x 0.1 to V_CC x 0.9
10ns
V_CC x 0.5
AC Electrical Specifications
Input pulse levels = V_CC x 0.1 to V_CC x 0.9; input rise and fall times = 10ns; input and ouput timing
level = V_CC x 0.5. Over recommended operating conditions, unless otherwise specified.
2.7 TO 5.5V
PARAMETER
SYMBOL
MIN
MAX
UNIT
SERIAL INPUT TIMING
Clock Frequency
Cycle Time
CS Lead Time
CS Lag Time
Clock HIGH Time
Clock LOW Time
Data Set-up Time
Data Hold Time
Input Rise Time
Input Fall Time
CS Deselect Time
Write Cycle Time
f_SCK
0
2
t_CYC
500
t_LEAD
250
t_LAG
250
t_WH
200
t_WL
250
t_SU
50
t_H
50
t_RI (Note 3)
100
t_FI (Note 3)
100
t_CS
500
t_WC (Note 4)
10
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Serial Input Timing
CS
SCK
SI
t_LEAD
t_SU
t_H
MSB IN
t_CS
t_LAG
t_RI
t_FI
LSB IN
SO
HIGH IMPEDANCE
12
FN8131.2
June 30, 2008