X5001_06 Datasheet, PDF (6/20 Pages) Intersil Corporation – CPU Supervisor

Figure 1. Sample V_TRIP Reset Circuit
V_TRIP
Adj.
V_P
Adjust
Run
X5001
1
8
2
7
3 ^X5001 6
4
5
4.7K
RESET
µC
SCK
SI
SO
CS
Figure 2. Set V_TRIP Level Sequence (V_CC = desired V_TRIP value)
V_PE
V_PE = 15-18V
CS
SCK
SI
0 1 2 3 4 5 6 7 8 9 10 20 21 22 23
16 Bits
03h
0001h
0 1 2 3 4 5 6 7 8 9 10 20 21 22 23
16 Bits
02h
0001h
Figure 3. Reset V_TRIP Level Sequence (V_CC > 3V)
V_PE
V_PE = 15-18V
CS
0 1 2 3 4 5 6 7 8 9 10 20 21 22 23
SCK
SI
03h
16 Bits
0001h
0 1 2 3 4 5 6 7 8 9 10 20 21 22 23
16 BBIiTtsS
02h
0003h
6
FN8125.1
May 30, 2006