X5001_06 Datasheet, PDF (14/20 Pages) Intersil Corporation – CPU Supervisor

SYMBOL TABLE
X5001
WAVEFORM INPUTS
OUTPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
Figure 12. Power-Up and Power-Down Timing
V_CC
V_TRIP
0 Volts
t_R
RESET (X5001)
t_PURST
t_PURST
V_TRIP
t_F
t_RPD
RESET Output Timing
Symbol
Parameter
V_TRIP
t_PURST
t_RPD(5)
t_F(5)
t_R(5)
V_RVALID
Reset trip point voltage, X5001PT-4.5A
Reset trip point voltage, X5001PT-4.5
Reset trip point voltage, X5001PT-2.7A
Reset trip point voltage, X5001PT-2.7
Reset trip point voltage, X5001PT-1.8
Power-up reset timeout
V_CC detect to reset/output
V_CC fall time
V_CC rise time
Reset valid V_CC
Note: (5) This parameter is periodically sampled and not 100% tested.
PT = Package, Temperature
Min.
4.50
4.25
2.85
2.55
1.70
100
0.1
0.1
1
Typ.
4.63
4.38
2.92
2.63
1.75
200
Max.
4.75
4.50
3.00
2.70
1.80
280
500
Unit
V
ms
ns
ns
ns
V
14
FN8125.1
May 30, 2006