ISL267450_14 Datasheet, PDF (5/19 Pages) Intersil Corporation – 12-Bit, 1MSPS SAR ADCs

ISL267450
Absolute Maximum Ratings
Any Pin to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Analog Input to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_DD+0.3V
Digital I/O to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_DD+0.3V
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_DD+0.3V
Maximum Current In to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
ESD Rating
Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 8kV
Machine Model (Tested per JESD22-A115B) . . . . . . . . . . . . . . . . . 400V
Charged Device Model (Tested per JESD22-C101E). . . . . . . . . . . . 1.5kV
Latch Up (Tested per JESD78C; Class 2, Level A) . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
θ_JA (°C/W) θ_JC (°C/W)
8 Ld SOIC Package (Notes 4, 5). . . . . . . . . . 120
64
8 Ld MSOP Package (Notes 4, 5). . . . . . . . . 165
64
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θ_JC, the “case temp” location is taken at the package top center.
Electrical Specifications V_DD = +3.0V to +3.3V, F_SCLK = 15MHz, F_S = 833kSPS, V_REF = 1.25V, F_IN = 200kHz; V_DD = +4.75V to
+5.25V, F_SCLK = 18MHz, F_S = 1MSPS, V_REF = 2.5V, F_IN = 300kHz; V_CM = V_REF, T_A = T_MIN to T_MAX unless otherwise noted. Typical values are at
T_A = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
(Note 6)
TYP
(Note 6)
UNITS
DYNAMIC PERFORMANCE
SINAD Signal-to (Noise + Distortion) Ratio
THD
SFDR
Total Harmonic
Distortion
Spurious Free Dynamic Range
IMD
Intermodulation Distortion
V_DD = 5V
V_DD = 3V
V_DD = 5V
V_DD = 3V
V_DD = 5V
V_DD = 3V
2nd Order Terms
70
dB
67
dB
-80
-75
dB
-78
-73
dB
-82
-75
dB
-80
-73
dB
–89
dB
3rd Order Terms
-85
dB
tpd
Aperture Delay
10
ns
Δtpd Aperture Jitter
50
ps
β3dB Full Power Bandwidth
@ –3dB
20
MHz
@ –0.1dB
2.5
MHz
PSRR Power Supply Rejection Ratio
-87
dB
DC ACCURACY
N
Resolution
12
Bits
INL
Integral Nonlinearity
-1
1
LSB
DNL Differential Nonlinearity
Guaranteed no missed codes to 12 bits
-0.95
0.95
LSB
OFFSET Zero-Code Error
GAIN Positive Gain Error
Negative Gain Error
V_DD = 5V
V_DD = 3V
V_DD = 5V
V_DD = 3V
V_DD = 5V
V_DD = 3V
-3
3
LSB
-6
6
LSB
-3
3
LSB
-6
6
LSB
-3
3
LSB
-6
6
LSB
5
FN8341.0
August 10, 2012