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X40410 Datasheet, PDF (4/24 Pages) Intersil Corporation – Dual Voltage Monitor with Intergrated CPU Supervisor
X40410, X40411, X40414, X40415
Figure 2. VTRIPX Set/Reset Conditions
VTRIPX
(X = 1, 2)
VCC/V2MON
VP
WDO
SCL
0
70
70
7
SDA
A0h
WATCHDOG TIMER
The Watchdog Timer circuit monitors the microprocessor
activity by monitoring the SDA and SCL pins. The micro-
processor must toggle the SDA pin HIGH to LOW period-
ically, while SCL also toggles from HIGH to LOW (this is
a start bit) followed by a stop condition prior to the expira-
tion of the watchdog time out period to prevent a WDO
signal going active. The state of two nonvolatile control
bits in the Status Register determines the watchdog timer
period. The microprocessor can change these watchdog
bits by writing to the X40410/11/14/15 control register
(also refer to page 19).
Figure 3. Watchdog Restart
.6µs
1.3µs
SCL
SDA
Timer Start
V1 AND V2 THRESHOLD PROGRAM PROCEDURE
(OPTIONAL)
The X40410/11/14/15is shipped with standard V1 and
V2 threshold (VTRIP1, VTRIP2) voltages. These values
will not change over normal operating and storage
conditions. However, in applications where the stan-
dard thresholds are not exactly right, or if higher preci-
sion is needed in the threshold value, the
X40410/11/14/15 trip points may be adjusted. The pro-
cedure is described below, and uses the application of
a high voltage control signal.
4
00h
tWC
Setting a VTRIPx Voltage (x = 1, 2)
There are two procedures used to set the threshold
voltages (VTRIPx), depending if the threshold voltage
to be stored is higher or lower than the present value.
For example, if the present VTRIPx is 2.9 V and the
new VTRIPx is 3.2 V, the new voltage can be stored
directly into the VTRIPx cell. If however, the new setting
is to be lower than the present setting, then it is neces-
sary to “reset” the VTRIPx voltage before setting the
new value.
Setting a Higher VTRIPx Voltage (x = 1, 2)
To set a VTRIPx threshold to a new voltage which is
higher than the present threshold, the user must apply
the desired VTRIPx threshold voltage to the corre-
sponding input pin Vcc(V1MON), or V2MON. The
Vcc(V1MON) and V2MON must be tied together dur-
ing this sequence. Then, a programming voltage (Vp)
must be applied to the WDO pin before a START con-
dition is set up on SDA. Next, issue on the SDA pin the
Slave Address A0h, followed by the Byte Address 01h
for VTRIP1 and 09h for VTRIP2, and a 00h Data Byte in
order to program VTRIPx. The STOP bit following a
valid write operation initiates the programming
sequence. Pin WDO must then be brought LOW to
complete the operation.
Note: This operation does not corrupt the memory
array.
Setting a Lower VTRIPx Voltage (x = 1, 2)
In order to set VTRIPx to a lower voltage than the
present value, then VTRIPx must first be “reset” accord-
ing to the procedure described below. Once VTRIPx
has been “reset”, then VTRIPx can be set to the desired
voltage using the procedure described in “Setting a
Higher VTRIPx Voltage”.
FN8116.0
March 28, 2005