X40410 Datasheet, PDF (18/24 Pages) Intersil Corporation – Dual Voltage Monitor with Intergrated CPU Supervisor

Write Cycle Timing
SCL
X40410, X40411, X40414, X40415
SDA
8^th Bit of Last Byte
ACK
t_WC
Stop
Condition
Start
Condition
Nonvolatile Write Cycle Timing
Symbol
Parameter
Min.
Typ.⁽¹⁾
Max.
Unit
t_WC(1)
Write Cycle Time
5
10
ms
Note: (1) t_WC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
Power Fail Timings
V_TRIPX
[ ] VCC or
V2MON
[ ] LOWLINE or
V2FAIL or
V3FAIL
t_R
t_RPDL
t_RPDX
V_RVALID
t_RPDL
t_RPDX
t_RPDL
t_RPDX
t_F
X = 2, 3
18
FN8116.0
March 28, 2005