ISL28025 Datasheet, PDF (31/47 Pages) Intersil Corporation – Precision Digital Power Monitor with Real Time Alerts

ISL28025
VSHUNT_OC_SET D[5:0]
The Vshunt_OC_Set bits controls the V_SHUNT voltage level to the
input of the OC comparator. The LSB of the DAC is 1.56% of the
full scale range chosen using the Vshunt_Thres_Rng bits.
The overvoltage range starts at 25% of the full scale range
chosen using Vbus_Thres_Rng bits and ends at 125% of the
chosen full scale range.
TABLE 29. Vshunt_OC_Set BITS DEFINED
Vshunt_OC_Set: D[5:0]
OC THRESHOLD VALUE
00 0000
25% of FS
00 0001
(25 + 1.56)% of FS
00 0010
(25 + 3.12)% of FS
...............
....................
11 1101
(125 to 4.68)% of FS
11 1110
(125 to 3.12)% of FS
11 1111
(125 to 1.56)% of FS
SMB Alert
The DPM has two alert pins (SMBALERT1, SMBALERT2) to alert
the peripheral circuitry that a failed event has occurred.
SMBALERT1 output is an open drain allowing the user the
flexibility to connect the alert pin to other components requiring
different logic voltage levels than the DPM. The SMBALERT2 has
a push/pull output stage for driving pins with logic voltage levels
equal to the voltage applied to I2CVCC pin. The push/pull output
is useful for driving peripheral components that require the DPM
to source and sink a current. The alert pins are commonly
connected to an interrupt pin of a microcontroller or an enable
pin of a device.
The SMBALERT registers control the functionality of the
SMBALERT pins. The threshold comparators are the inputs to the
SMBALERT registers. The output are the SMBALERT pins.
Figure 68 is a simple functional block diagram of the SMB Alert
features.
FIGURE 68. SIMPLIFIED BLOCK DIAGRAM OF THE SMBALERT FUNCTIONS WITHIN THE DPM
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FN8388.3
June 17, 2015