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ISL28025 Datasheet, PDF (29/47 Pages) Intersil Corporation – Precision Digital Power Monitor with Real Time Alerts
ISL28025
0X8D READ TEMPERATURE (R)
The read temperature register is a readable word register that
reports out the internal temperature of the chip. The register is a
16-bit signed register. Bit 15 of the register is the signed bit. The
register value can be calculated using Equation 12.
 Register Value
 14



Bit_Valn2n





Bit_Val15215
n  0

(EQ. 12)
n is the bit position within the register value. Bit_Val is the value
of the bit either 1 or 0. The register value multiplied by 0.016
yields the internal temperature reading in Centigrade (°C).
Threshold Detectors
The DPM has three integrated comparators that allow for real
time fault detection of overvoltage, undervoltage for the primary
VBUS input and an overcurrent detection for the primary VSHUNT
input. An over-temperature detection is available by multiplexing
the input to the overvoltage comparator.
TABLE 21. 0xDA VOUT OV THRESHOLD SET REGISTER DEFINITION
BIT
NUMBER D[15:10] D[9]
D[8:6]
D[5:0]
Bit Name N/A
OV_OT Vbus_Thres_Rng Vbus_OV_OT_Set
SEL
Default 0000 00 0
Value
0 00
11 1111
OV_OT_SEL D[9]
The OV_OT_SEL bit configures the multiplexer to the input of the
OV comparator to either compare for over-temperature or
overvoltage. Setting the OV_OT_SEL to a 1 configures the OV
comparator to detect for an over-temperature condition.
VBUS_THRES_RNG D[8:6]
The Vbus_Thres_Rng bits sets the threshold voltage range for the
overvoltage and undervoltage DACs. There are 6 selectable
ranges for the 60V version of the DPM. Only 4 selectable ranges
for the 12V version of the DPM. Table 22 defines the range
settings for the VBUS threshold detector. The yellow shaded row
denotes the default setting.
The temperature threshold reference level has one range setting
which equals +125°C at full scale.
TABLE 22. Vbus_Thres_Rng BITS DEFINED
Vbus_Thres_Rng: D[8:6]
Vbus_12V
(RANGE)
0
0
0
12
0
0
1
6
0
1
0
3
0
1
1
1.25
1
0
0
X
1
0
1
X
Vbus_60V
(RANGE)
48
24
12
5
3.3
2.5
FIGURE 67. SIMPLIFIED BLOCK DIAGRAM OF THE THRESHOLD
FUNCTIONS WITHIN THE DPM
0XDA VOUT OV THRESHOLD SET (R/W)
The VOUT OV Threshold Set register is a read/writable word
register that controls the threshold voltage level to the
overvoltage comparator. The description of the functionality
within this register is found in Table 21.
The compared reference voltage level to the OV comparator is
generated from a 6-bit DAC. The 6-bit DAC has 4 or 6 voltage
ranges to improve detection voltage resolution for a specific
voltage range
VBUS_OV_OT_SET D[5:0]
The Vbus_OV_OT_Set bits controls the voltage/temperature level
to the input of the OV comparator. The LSB of the DAC is 1.56%
of the full scale range chosen using the Vbus_Thres_Rng bits. For
the temperature feature, the LSB for the temperature level is
5.71°C. The mathematical range is -144°C to +221.4°C.
The overvoltage range starts at 25% of the full scale range
chosen using the Vbus_Thres_Rng bits and ends at 125% of the
chosen full scale range. The same range applies to the
temperature measurements.
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FN8388.3
June 17, 2015