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HC55120_06 Datasheet, PDF (29/36 Pages) Intersil Corporation – Low Power Universal SLIC Family
HC55120, HC55121, HC55130, HC55140, HC55142, HC55143, HC55150
Pinouts - 28 Lead SOIC Packages (Continued)
HC55130
(28 LEAD SOIC)
TOP VIEW
HC55140
(28 LEAD SOIC)
TOP VIEW
ZT 1
PTG 2
RRLY 3
CH 4
RING 5
BGND 6
TIP 7
VBH 8
VBL 9
RDC_RAC 10
CDC 11
DT 12
DR 13
CRT 14
28 AGND
27 VTX
26 NC
25 VRX
24 RSYNC
23 ILIM
22 ROH
21 RD
20 VCC
19 SHD
18 C1
17 C2
16 C3
15 NC
HC55142
(28 LEAD SOIC)
TOP VIEW
ZT 1
PTG 2
RRLY 3
CH 4
RING 5
BGND 6
TIP 7
VBH 8
VBL 9
RDC_RAC 10
CDC 11
DT 12
DR 13
CRT_REV_LVM 14
28 AGND
27 VTX
26 SPM
25 VRX
24 RSYNC_REV
23 ILIM
22 ROH
21 RD
20 VCC
19 SHD
18 C1
17 C2
16 C3
15 GKD_LVM
ZT 1
PTG 2
RRLY 3
CH 4
RING 5
BGND 6
TIP 7
VBH 8
VBL 9
RDC_RAC 10
CDC 11
DT 12
DR 13
CRT_REV_LVM 14
28 AGND
27 VTX
26 NC
25 VRX
24 RSYNC_REV
23 ILIM
22 ROH
21 RD
20 VCC
19 SHD
18 C1
17 C2
16 C3
15 GKD_LVM
HC55150
(28 LEAD SOIC)
TOP VIEW
ZT 1
PTG 2
RRLY 3
CH 4
RING 5
BGND 6
TIP 7
VBH 8
VBL 9
RDC_RAC 10
CDC 11
DT 12
DR 13
CRT_REV_LVM 14
28 AGND
27 VTX
26 SPM
25 VRX
24 RSYNC_REV
23 ILIM
22 ROH
21 RD
20 VCC
19 SHD
18 C1
17 C2
16 C3
15 LVM
Pin Descriptions
28
PIN
PLCC
1
32
PIN
PLCC
1
28
PIN
SOIC
2
SYMBOL
PTG
2
2
3
3
3
4
4
4
1
5
5
5
6
6
6
7
7
7
RRLY
CH
ZT
RING
BGND
TIP
DESCRIPTION
Programmable Transmit Gain - The 2-wire to 4-wire transmission gain is 0dB if this pin is left floating
and -6.02dB if tied to ground. The -6.02dB gain option is useful in systems where Pulse Metering is
used. See Figure 23.
Ring Relay Driver Output - The relay coil may be connected to a maximum of 14V.
AC/DC Separation Capacitor - CH is required to properly process the AC current from the DC loop
current. Recommended value 0.1µF.
2-Wire Impedance Matching Pin - Impedance matching of the 2-wire side is accomplished by placing
an impedance between the ZT pin and ground. See Equation 32.
Connects via protection resistor RP to ring wire of subscriber pair.
Battery ground.
Connects via protection resistor RP to tip wire of subscriber pair.
29
FN4659.13
June 1, 2006