HC55120_06 Datasheet, PDF (1/36 Pages) Intersil Corporation – Low Power Universal SLIC Family

HC55120, HC55121, HC55130, HC55140,
®
HC55142, HC55143, HC55150
Data Sheet
June 1, 2006
FN4659.13
Low Power UniSLIC14 Family
Features
The UniSLIC14 is a family of Ultra Low Power SLICs. The
feature set and common pinouts of the UniSLIC14 family
positions it as a universal solution for: Plain Old Telephone
Service (POTS), PBX, Central Office, Loop Carrier, Fiber in
the Loop, ISDN-TA and NT1+, Pairgain and Wireless Local
Loop.
The UniSLIC14 family achieves its ultra low power operation
through: Its automatic single and dual battery selection (based
on line length) and battery tracking anti clipping to ensure the
maximum loop coverage on the lowest battery voltage. This
architecture is ideal for power critical applications such as
ISDN NT1+, Pairgain and Wireless local loop products.
• Ultra Low Active Power (OHT) < 60mW
• Single/Dual Battery Operation
• Automatic Silent Battery Selection
• Power Management/Shutdown
• Battery Tracking Anti Clipping
• Single 5V Supply with 3V Compatible Logic
• Zero Crossing Ring Control
- Zero Voltage On/Zero Current Off
• Tip/Ring Disconnect
• Pulse Metering Capability
• 4 Wire Loopback
The UniSLIC14 family has many user programmable features.
This family of SLICs delivers a low noise, low component
count solution for Central Office and Loop Carrier universal
voice grade designs. The product family integrates advanced
pulse metering, test and signaling capabilities, and zero
crossing ring control.
The UniSLIC14 family is designed in the Intersil “Latch” free
Bonded Wafer process. This process dielectrically isolates the
active circuitry to eliminate any leakage paths as found in our
competition’s JI process. This makes the UniSLIC14 family
compliant with “hot plug” requirements and operation in harsh
outdoor environments.
Block Diagram
RRLY
TRLY1
TRLY2
DT
DR
RING AND TEST
RELAY DRIVERS
ZERO CURRENT
CROSSING
RING TRIP
DETECTOR
POLARITY
REVERSAL
TIP
RING
BGND
AGND
2-WIRE
INTERFACE
V_BH
V_BL
V_CC
BATTERY
SELECTION
AND
BIAS
NETWORK
STATE
DECODER
AND
DETECTOR
LOGIC
LOOP CURRENT
DETECTOR
GKD/LOOP LENGTH
DETECTOR
C1
C2
C3
C4
C5
SHD
GKD_LVM
CRT_REV_LVM
LINE FEED
CONTROL
4-WIRE INTERFACE
VF SIGNAL PATH
PULSE METERING
SIGNAL PATH
ILIM
RSYNC_REV
ROH
CDC
RDC_RAC
RD
V_TX
V_RX
PTG
ZT
C_H
• Programmable Current Feed
• Programmable Resistive Feed
• Programmable Loop Detect Threshold
• Programmable On-Hook and Off-Hook Overheads
• Programmable Overhead for Pulse Metering
• Programmable Polarity Reversal Time
• Selectable Transmit Gain 0dB/-6dB
• 2 Wire Impedance Set by Single Network
• Loop and Ground Key Detectors
• On-Hook Transmission
• Common Pinout
• Pb-Free Plus Anneal Available (RoHS Compliant)
• HC55121
- Polarity Reversal
• HC55130
- -63dB Longitudinal Balance
• HC55140
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2 Wire Loopback
- -63dB Longitudinal Balance
• HC55142
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2.2V_RMS Pulse Metering
- 2 Wire Loopback
• HC55150
- Polarity Reversal
- Line Voltage Measurement
- 2.2V_RMS Pulse Metering
- 2 Wire Loopback
Related Literature
• AN9871, User’s Guide for UniSLIC14 Eval Board
SPM
• AN9903, UniSLIC14 and TI TCM38C17
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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