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| HMP8117 Datasheet, PDF (28/45 Pages) Intersil Corporation – NTSC/PAL Video Decoder | |||
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HMP8117
TABLE 22. VIDEO STATUS REGISTER
BIT
NO.
FUNCTION
SUB ADDRESS = 0EH
DESCRIPTION
7
Vertical Lock
Status
This bit is read-only. Data written to this bit is ignored.
If set to â1â, the decoder is vertically locked to the input signal.
6
Horizontal Lock
This bit is read-only. Data written to this bit is ignored.
Status
If set to â1â, the decoder is horizontally locked to the input signal.
5
Color Lock
Status
This bit is read-only. Data written to this bit is ignored.
If set to â1â, the decoder is chroma locked to the input signal.
4
Input Video
Detect Status
This bit is read-only. Data written to this bit is ignored.
If set to â1â, video is detected on the input signal.
3-1
MV Detection Status These bits are read-only. Data written to this bit is ignored.
000B = No MV present
001B = PSP present, No Stripes
010B = PSP present, 2-Line Stripes
011B = PSP present, 4-line Stripes
100B = reserved
101B = reserved
110B = No PSP present, 2-line Stripes (invalid MV scheme, may indicate false detection)
111B = No PSP present, 4-line Stripes (invalid MV scheme, may indicate false detection)
0
Auto Detect
This bit is read-only. Data written to this bit is ignored.
Video Standard
If set to â1â, the decoder determined the video standard on the input signal.
Status
This bit is enabled by the Input Format Register 01H bit 4.
TABLE 23. INTERRUPT MASK REGISTER
BIT
NO.
FUNCTION
SUB ADDRESS = 0FH
DESCRIPTION
7
Genlock Loss
Interrupt Mask
If set to â1â, an interrupt is enabled for the loss of genlock.
6
Input Signal Loss If set to â1â, an interrupt is enabled for the loss of input video signal.
Interrupt Mask
5
Closed Caption
If set to â1â, an interrupt is enabled for new data in the closed caption data registers.
Interrupt Mask
4
WSS
Interrupt Mask
If set to â1â, an interrupt is enabled for new data in the WSS data registers.
3
Teletext
Interrupt Mask
If set to â1â, an interrupt is enabled for the detection of teletext data in the current field.
2
MV Interrupt Mask If set to â1â, an interrupt is enabled for a change in the MV Detection Status Register 0EH.
1
Auto Detect
If set to â1â, an interrupt is enabled for the successful auto detection of a video standard.
Video Standard
Interrupt Mask
0
Vertical Sync
Interrupt Mask
If set to â1â, an interrupt is enabled for the start of a new field.
RESET
STATE
0B
0B
0B
0B
000B
0B
RESET
STATE
0B
0B
0B
0B
0B
0B
0B
0B
28
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