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HMP8117 Datasheet, PDF (22/45 Pages) Intersil Corporation – NTSC/PAL Video Decoder
HMP8117
DATA WRITE
1000 1000
S CHIP ADDR A
0x88
DATA READ
1000 1000 (R/W)
S CHIP ADDR A
0x88
SUB ADDR
SUB ADDR
A DATA A DATA A P
REGISTER
POINTED
TO BY
SUB ADDR
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
FROM MASTER
FROM HMP8117
AS
CHIP ADDR
0x89
A DATA
A DATA
NA P
REGISTER
POINTED
TO BY
SUB ADDR
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
FIGURE 19. REGISTER WRITE/READ FLOW
S = START CYCLE
P = STOP CYCLE
A = ACKNOWLEDGE
NA = NO ACKNOWLEDGE
Control Registers
R
TABLE 10. CONTROL REGISTER SUMMARY
SUB-
ADDRESS
CONTROL REGISTER
RESET/
DEFAULT
VALUE
USE
VALUE
COMMENTS
00H
01H
02H
03H
04H
05H
06H
08H
0AH
0BH
0CH
0EH
0FH
10H
11H
12H
14H/13H
15H
16H
17H
18H
19H
1AH
Product ID
Input Format
Output Format
Output Control
Genlock Control
Analog Input Control
Color Processing
Luma Processing
Sliced VBI Data Enable
Sliced VBI Data Output
VBI Data Status
Video Status
Interrupt Mask
Interrupt Status
Raw VBI Control
Raw VBI Start Count
Raw VBI Stop Count MSB/LSB
Raw VBI Line Mask_7_0
Raw VBI Line Mask_15_8
Raw VBI Line Mask_18_16
Brightness
Contrast
Hue
16H or 17H
19H
00H
00H
09H
10H
52H
04H
00H
00H
00H
00H
00H
00H
00H
7AH
03H/4AH
FEH
1FH
00H
00H
80H
00H
Returns last two digits of part number in hex format.
Defaults to auto-detect of input video standard.
Defaults to 16-bit YCbCr data format.
C0H
Set Bits 7-6 to enable data and timing outputs.
Defaults to 27MHz CLK2, Rectangular Pixel Mode
Defaults to input signal select = CVBS1.
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