ISL68201 Datasheet, PDF (27/32 Pages) Intersil Corporation – Single-Phase R4 Digital Hybrid PWM Controller

ISL68201
COMPENSATION TO COUNTER
INTEGRATOR POLE
INTEGRATOR
FOR HIGH DC GAIN
V_OUT
V_COMP
V_DAC
FIGURE 25. CLASSICAL INTEGRATOR ERROR-AMPLIFIER
CONFIGURATION
Figure 25 illustrates the classic integrator configuration for a
voltage loop error amplifier. While the integrator provides the
high DC gain required for accurate regulation in traditional
technologies, it also introduces a low-frequency pole into the
control loop. Figure 26 shows the open-loop response that results
from the addition of an integrating capacitor in the voltage loop.
The compensation components found in Figure 25 are necessary
to achieve stability.
Because R4™ does not require a high-gain voltage loop, the
integrator can be removed, reducing the number of inherent
poles in the loop to two. The current-mode zero continues to
cancel one of the poles, ensuring a single-pole crossover for a
wide range of output filter choices. The result is a stable system
with no need for compensation components or complex
equations to properly tune the stability.
Figure 27 shows the R4™ error-amplifier that does not require an
integrator for high DC gain to achieve accurate regulation. The
result to the open loop response can be seen in Figure 28.
R3™ LOOP GAIN (dB)
INTEGRATOR POLE
p1
L/C DOUBLE-POLE
p2
p3
-20dB CROSSOVER
REQUIRED FOR STABILITY
CURRENT-MODE
ZERO
z1
COMPENSATOR TO
ADD z2 IS NEEDED
-20dB/dec
f (Hz)
FIGURE 26. UNCOMPENSATED INTEGRATOR OPEN-LOOP RESPONSE
V_OUT
R₁
R₂
-
+
V_COMP
V_DAC
FIGURE 27. NON-INTEGRATED R4 ERROR-AMPLIFIER
CONFIGURATION
R4™ LOOP GAIN (dB)
L/C DOUBLE-POLE
p1
p2
CURRENT-MODE
ZERO
z1
SYSTEM HAS 2 POLES
AND 1 ZERO
NO COMPENSATOR IS
NEEDED
-20dB/-d2e0cdB/dec
f (Hz)
FIGURE 28. UNCOMPENSATED R4 OPEN-LOOP RESPONSE
TRANSIENT RESPONSE
In addition to requiring a compensation zero, the integrator in
traditional architectures also slows system response to transient
conditions. The change in COMP voltage is slow in response to a
rapid change in output voltage. If the integrating capacitor is
removed, COMP moves as quickly as V_OUT, and the modulator
immediately increases or decreases switching frequency to
recover the output voltage.
I_OUT
V_COMP
V_OUT
R4™
t
R3™
t
t
FIGURE 29. R3™ vs R4™ IDEALIZED TRANSIENT RESPONSE
The dotted red and blue lines in Figure 29 represent the time
delayed behavior of V_OUT and V_COMP in response to a load
transient when an integrator is used. The solid red and blue lines
illustrate the increased response of R4™ in the absence of the
integrator capacitor.
To optimize transient response and improve phase margin for
very wide range applications, ISL68201 integrates couple
selectable AV and RR options that move DC gain and z1 point, as
shown in Figure 28. The defaulted AV gain of 42 and RR of
200kΩ however can cover many cases and provides sufficient
gain and phase margin. For some extreme cases, lower AV gain
and bigger RR values are needed to provide a better phase
margin and improve transient ringback. The optimal choice AV
and RR can be obtained, by simple monitoring transient
response when playing with AV and RR values via the series bus.
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FN8696.1
March 7, 2016