ISL68201 Datasheet, PDF (21/32 Pages) Intersil Corporation – Single-Phase R4 Digital Hybrid PWM Controller

ISL68201
Equation 14 provides a starting point to set a preliminary OCP
trip point, where IOCP is the targeted OCP trip point and DI (as in
Equation 15) is the peak-to-peak inductor ripple current.
R_ISEN1 = ^R----₁-^x--₀-^x---₀-^I--^O_----^C_A----^P--
R_ISEN2 = -₁---₀---₀---^R-_---^x-_A---^x-_x--^--_-^---21------^I-₀--+-₀----_%I--^O-----^C_+----^P-₃--^-₀----_%------_
(EQ. 14)
R_ISEN = MAX (R_ISEN1, R_ISEN2 
To deal with layout and PCB contact impedance variation, follow
the fine tune procedure below step-by-step for a more precision
OCP; steps 1 to 3 must be completed before step 4.
1. Properly tune L/DCR or ESL/R_SEN matching as shown on
page 17 over the range of temperature operation. +25% over-
matching L/DCR at room temperature is needed for -40°C
operation.
2. Properly complete thermal compensation as shown on
“Thermal Monitoring and Compensation” on page 17.
3. Collect OCP trip points (IOCP_MEASURED) with sufficient
prototypes and determine the mean for overall operating
conditions and board variations.
4. Change R_ISEN by IOCP_TARGETED/IOCP_MEASURED
percentage to meet the targeted OCP.
Note that if the inductor peak-to-peak current is higher or closer
to 30%, the +30% threshold could be triggered instead of the
average OCP threshold. However, the fine tune procedure still can
be used.
OVER-TEMPERATURE PROTECTION
As shown in Figures 16 on page 18, there is a comparator with
hysteresis to compare the NTC pin voltage to the threshold set.
When the NTC pin voltage is lower than 22.31% of V_CC voltage
(typically +136°C), it triggers Over-temperature Protection (OTP)
and shuts down ISL68201 operation, when the NTC pin voltage is
above 27.79% of V_CC voltage (typically +122.4°C), it will resume
normal operation. When an OTP fault is declared, the controller
will force the LGATE and UGATE gate-driver outputs low.
PGOOD Monitor
The PGOOD pin indicates when the converter is capable of
supplying regulated voltage. If there is a fault condition of a rail’s
(VCC, PVCC, 7VLDO, or VIN) UVLO, output Overcurrent (OCP),
Overvoltage (OVP), Undervoltage (UVP), or Over-temperature (OTP),
PGOOD is asserted low. Note that the PGOOD pin is an undefined
impedance with insufficient VCC (typically <2.5V).
PFM Mode Operation
In PFM mode, programmable by PROG2 or series bus D0[0:0],
the switching frequency is dramatically reduced to minimize the
switching loss and significantly improve light-load efficiency. The
ISL68201 can enter and exit PFM mode seamlessly as load
changes. The PFM mode is only compatible with Intersil’s
ISL99140 DrMOS with SMOD input by connecting to ISL68201’s
FCCM output pin. Incompatible power stages should operate in
PWM mode.
SMBus, PMBus and I²C Operation
The ISL68201 features SMBus, PMBus, and I²C with 32
programmable addresses via PROG2 pin, while SMBus/PMBus
includes an Alert# line (SALERT) and Packet Error Check (PEC) to
ensure data properly transmitted. The telemetry update rate is
108µs (Typically). The supported SMBus/PMBus/I²C addresses
are summarized in Table 10. The 7-bit format address does not
include the last bit (write and read): 40-47h, 60-67h and 70-7Fh.
SMBus/PMBus/I²C allows to program the registers as in
Table 11, except for SMBus/PMBus/I²C addresses, 5.5ms
(typically, worst 6.5ms) after all rails (VCC, PVCC, 7VLDO and VIN)
above POR. Figures 21 and 22 show the initialization timing
diagram for the series bus with different state of EN (Enable) pin.
For proper operation, users should follow the SMBus, PMBus and
I²C protocol, as shown Figure 23 on page 23. Note that STOP (P)
bit is NOT allowed before the repeated START condition when
“reading” contents of register.
When the device’s series bus is not used, simply ground the
device’s SCL, SDA and SALERT pins and do not connect them to
the bus.
TABLE 10. SMBus/PMBus/I²C 7-BIT FORMAT ADDRESS (HEX)
7-BIT ADDRESS
7-BIT ADDRESS
7-BIT ADDRESS
40
63
76
41
64
77
42
65
78
43
66
79
44
67
7A
45
70
7B
46
71
7C
47
72
7D
60
73
7E
61
74
7F
62
75
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FN8696.1
March 7, 2016