ISL68201 Datasheet, PDF (19/32 Pages) Intersil Corporation – Single-Phase R4 Digital Hybrid PWM Controller

ISL68201
Since the NTC attaches to the PCB, but not directly to the current
sensing component, it inherits high thermal impedance between
the NTC and the current sensing element. The “TCOMP” register
values can be utilized to correct the temperature difference
between NTC and the current sense component. As shown in
Figure 19, the NTC should be placed in proximity to the output
rail; DO NOT place it close to the MOSFET side, which generates
much more heat.
VOUT
OUTPUT
INDUCTO R
POWE R STAGE
FIGURE 19. RECOMMENDED PLACEMENT OF NTC
The ISL68201 multiplexes the “TCOMP” value with the NTC
digital signal to obtain the adjustment gain to compensate the
temperature impact on the sensed channel current. The
compensated current signal is used for I_OUT and overcurrent
protection functions. The TCOMP “OFF” code is to disable thermal
compensation when the current sensing element is the resistor
or smart power stage (internally thermal compensated) that has
little thermal drifting.
TABLE 8. “TCOMP” VALUES”
D1h
TCOMP (°C)
D1h
TCOMP (°C)
0h
30
2h
5
1h
15
3h
OFF
Thermal compensation design procedure for inductor current
sensing is summarized as follows:
1. Properly choose the voltage divider for the NTC pin to match
the NTC voltage vs temperature curve with the recommended
curve in Figure 18 on page 18.
2. Run the actual board under the full load and the desired
airflow condition.
3. After the board reaches the thermal steady state (often takes
15 minutes), record the temperature (T_CSC) of the current
sense component (inductor) and the voltage at NTC and VCC
pins.
4. Use Equation 9 to calculate the resistance of the NTC, and
find out the corresponding NTC temperature T_NTC from the
NTC datasheet or using Equation 10, where is equal to 3380
for recommended NTC.
R_NTCat T_NTC = _V-V----C-^T---_CM-----x_–----R-V---^T-_T---^M-_M--
(EQ. 9)
T_NTC
=
----------------------------------------^---------------------------------------- – 273.15
ln



R^-R----_N^-N---_T^-T---_CC^----^---aa^---t^-t----T2^----_N^5----_T^--C-_C^-----
+
2^----9^---8^----.^-1^----5^-
(EQ. 10)
5. Choose a number close to the result as in Equation 11 for the
“TCOMP” register.
T_COMP = T_CSC – T_NTC
(EQ. 11)
6. Run the actual board under full load again.
7. Record the IOUT pin voltage as V1 immediately after the
output voltage is stable with the full load. Record the IOUT pin
voltage as V2 after the VR reaches the thermal steady state.
8. If the IOUT pin voltage increases over 10mV as the
temperature increases, i.e., V2 - V1 > 10mV, reduce “TCOMP”
value. If the IOUT pin voltage decreases over 10mV as the
temperature increases, i.e., V1 - V2 > 10mV, increase
“TCOMP” value. “TCOMP” value can be adjusted via the series
bus for easy thermal compensation optimization.
IOUT Calibration
The current flowing out of the IOUT pin is equal to the sensed
average current inside ISL68201. A resistor is placed from the
IOUT pin to GND to generate a voltage, which is proportional to
the load current and the resistor value, as shown in Equation 12:
R_IOUT = ²-₆---^.3--⁵--_.-_8V----₇-^x--₅-^R---_A--^I--^S_x----^E_R---^N-_x-- = -²---^.--⁵-₆--^V--₃---^x.--₈-^--₇--^R----₅---^1--x---_A-^0--x-----0-_x^-I----^O-^-_R-------^CA--_x^{------P-----}--
= -₆---₃---_.-²-₈--^.-₇-⁵---₅-^V--_A--^x---_xI--^O-₁----₀^C---₀-^P---_----_A-- = ²----₆₅---₃-^V--_.--_8x---₇-^I--^O-₅---^C_A----^P-- k
(EQ. 12)
Where V_IOUT is the voltage at the IOUT pin, R_IOUT is the resistor
between the IOUT pin and GND, I_LOAD is the total output current
of the converter, R_ISEN is the sense resistor connected to the
CSRTN pin and R_X is the DC resistance of the current sense
element, either the DCR of the inductor or R_SENSE depending on
the sensing method. The R_IOUT resistor should be scaled to
ensure that the voltage at the IOUT pin is typically 2.5V at
63.875A load current. The IOUT voltage is linearly digitized every
108µs and stored in the READ_IOUT register (8Ch).
ISL68201
DIGITIZED
IOUT (8Ch)
VCC
EXTERNAL CIRCUIT
IOUT
R_{IOUT_UP}
R_{IOUT_DW}
FIGURE 20. IOUT NO LOAD OFFSET CALIBRATION
A small capacitor can be placed between IOUT and GND to
reduce the noise impact and provide averaging, > 200µs
(typically).
To deal with layout and design variation of different platforms,
the ISL68201 is intentionally trimmed to negative at no load,
thus, an offset can easily be added to calibrate the digitized IOUT
reading (8Ch). Hence, the analog vs digitized current slope is set
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FN8696.1
March 7, 2016