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| X5643 Datasheet, PDF (14/19 Pages) Intersil Corporation – CPU Supervisor with 64Kbit SPI EEPROM | |||
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X5643, X5645
RESET/RESET Output Timing
Symbol
Parameter
tWDO
tCST
tRST
Watchdog time out period,
WD1 = 1, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 0, WD0 = 0
CS pulse width to reset the watchdog
Reset time out
Min.
100
450
1
400
100
VTRIP Set Conditions
VCC
VTRIP
tTHD
tTSU
tRP
tVPS
tP
tVPH
CS
tVPS
tVPH
tVPO
VP
SCK
VP
SI
tVPO
Typ.
200
600
1.4
200
VTRIP Reset Conditions
VCC*
CS
SCK
SI
VCC
VP
tVPS
tP
tVP1
tVPS
tVPH
tRP
tVPO
tVPO
*VCC > Programmed VTRIP
Max.
300
800
2
300
Unit
ms
ms
sec
ns
ms
14
FN8135.1
July 18, 2005
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