ISL33001_14 Datasheet, PDF (14/18 Pages) Intersil Corporation – I2C Bus Buffer with Rise Time Accelerators and Hot Swap Capability

ISL33001, ISL33002, ISL33003
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE
REVISION
CHANGE
July 11, 2014
FN7560.6
In “Features” on page 1, changed “Low quiescent Current” from “2.2mA” to “2.1mA”.
On page 4, added “Pb-Free Reflow Profile” entry to “Thermal Info” section.
In “Electrical Spec” table on page 4, changed “V_CC” to “V_CC1” in the “Supply Current from V_CC2” row.
In “Electrical Spec” table on page 5, for parameter “Input Low Threshold”, moved the “TYP” column
entry to the “MAX” column.
On page 6, Figure 4, clarified the associated notes.
On page 7, Figure 8, changed “I_ACC” to I_{TRAN_ACC}”, and noted that the V/t is for the accelerator
portion of the waveform.
December 19, 2013
FN7560.5
Added Note 13 at the end of the "Elec Spec" table on page 5 as follows:
“13. If the Vcc1 and Vcc2 voltages diverge, then the shut-down Icc increases on the higher voltage
supply."
Added reference "(Note 13)" after "ISL33003 only" in rows for Vcc1 and Vcc2 "Shut-down Supply
current" parameters (last 2 rows of "Power Supplies" section) on page 4.
October 12, 2012
FN7560.4
Changed “SDA_IN, SCL_IN...0.3V to +(V_CC1 + 0.3)V, SDA_OUT, SCL_OUT...0.3V to +(V_CC2 + 0.3)V,
ENABLE, READY, ACC...0.3V to +(V_CC1 + 0.3)V” to “SDA_IN, SCL_IN, SDA_OUT, SCL_OUT, READY...0.3V
to +7V; ENABLE, ACC...0.3V to +(V_CC1 + 0.3)V”, in the Absolute Maximum Ratings section at the top of
page 4.
Removed “Pb-free Reflow Profile” and link from “Thermal Information” section at the top of page 4.
Added “open drain” and “Connect to 10kΩ pull-up resistor to V_CC1.”, in Pin Descriptions in the READY
section on page 3.
October 11, 2011
FN7560.3
Converted to new datasheet template.
Changed Title of datasheet from: “2-Wire Bus Buffer With Rise Time Accelerators and Hot Swap
Capability”
to: I²C Bus Buffer with Rise Time Accelerators and Hot Swap Capability
Pg 1, added to Related Literature: AN1637, “Level Shifting Between 1.8V and 3.3V Using I2C Buffers”
Replaced POD M8.118 Rev 3 with Rev 4 due to the following changes:
Corrected lead width dimension in side view 1 from "0.25 - 0.036" to "0.25 - 0.36"
Replaced POD M8.15 Rev 1 with Rev 3 due to the following changes:
Changed in Typical Recommended Land Pattern the following:
2.41(0.095) to 2.20(0.087)
0.76 (0.030) to 0.60(0.023)
0.200 to 5.20(0.205)
Figure 3 (was Fig1) - Added:
- If tDELAY1 < tEN-LH then tDELAY2 = tEN-LH + tIDLE + tREADY-LH
- If tDELAY1 > tEN-LH then tDELAY2 = tEN-LH + tREADY-LH
and replaced graph
September 13, 2010
FN7560.2
Added SOIC package information to datasheet for ISL33001.
April 30, 2010
FN7560.1
Changed typical value of “Supply Current from V_CC1” on page 4 for ISL33001 only from 2.2mA to
2.1mA.
Changed typical value of “Input-Output Offset Voltage” on page 5 from 100mV to 50mV.
March 18, 2010
FN7560.0
Initial Release.
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FN7560.6
July 11, 2014