ISL71841SEH Datasheet, PDF (11/29 Pages) Intersil Corporation – Radiation Hardened 30V 32-Channel Analog

ISL71841SEH
Timing Diagrams
+4.0V
+0.8V
ISL71841SEH
A4
IN01
A3
A2
IN02-IN31
50Ω
A1
A0
IN32
+15V, 0V
0V, +15V
+0.8V EN
OUT
10kΩ
50pF
FIGURE 4. ADDRESS TIME TO OUTPUT TEST CIRCUIT
ISL71841SEH
A4
IN01
A3
A2
IN02-IN32
A1
A0
+10V
+4.0V
+0.8V
EN
50Ω
OUT
1kΩ
50pF
FIGURE 6. TIME TO ENABLE/DISABLE OUTPUT TEST CIRCUIT
4V
“11111”
ADDRESS
50%
50%
0.8V
15V
OUTPUT
“00000”
tAHL
50%
tALH
50%
0V
FIGURE 5. ADDRESS TIME TO OUTPUT DIAGRAM
4V
ENABLE
50%
50%
0.8V
10V
OUTPUT
tENABLE
50%
tDISABLE
50%
0V
FIGURE 7. TIME TO ENABLE/DISABLE OUTPUT DIAGRAM
+4.0V
+0.8V
50Ω
ISL71841SEH
A4
IN01
A3
A2
IN02-IN31
A1
IN32
A0
+0.8V EN
OUT
+5V
1kΩ
VOUT
50pF
FIGURE 8. BREAK-BEFORE-MAKE TEST CIRCUIT
+4.0V
+0.8V
ISL71841SEH
A4
IN01
A3
A2
IN02-IN31
50Ω
A1
A0
IN32
+0.8V EN
OUT
0V
VOUT
100pF
FIGURE 10. CHARGE INJECTION TEST CIRCUIT
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4V
ADDRESS
0.8V
5V
OUT
50%
0V
tBBM
FIGURE 9. BREAK-BEFORE-MAKE DIAGRAM
4V
ADDRESS
0.8V
15V
OUT
0V
Q = 100pF * ΔVOUT
ΔVOUT
FIGURE 11. CHARGE INJECTION DIAGRAM
FN8735.4
June 3, 2016