82567 Datasheet, PDF (7/33 Pages) Intel Corporation – GbE Physical Layer Transceiver (PHY)

Datasheet—82567
2.0
2.1
2.2
Signal Descriptions
Signal Type Definitions
The signals are defined as follows in the table below:
Type
In (I)
Out (O)
T/s
S/st/s
O/d
A-in
A-out
B
P
PU
PD
Description
Standard input-only signal.
Totem pole output is a standard active driver.
Tri-state is a bi-directional, tri-state input/output pin.
Sustained tri-state is an active low tri-state signal owned and driven by one
and only one agent at a time. The agent that drives an s/t/s pin low must
drive it high for at least one clock before letting it float. A new agent cannot
start driving an s/t/s signal any sooner than one clock after the previous
owner tri-states it.
Open drain enables multiple devices to share as a wire-OR.
Analog input signal.
Analog output signal.
Input bias.
Power
Pull-up.
Pull-down.
GLCI Interface Pins
Signal Name
GLAN_RXP
GLAN_RXN
GLAN_TXN
GLAN_TXP
XTAL2
XTAL1
Pin
55
56
53
52
9
10
Type
A-in
A-out
A-out
A-in
Description
GLCI Serial Data Input
This is the differential input for GLCI (MAC to PHY).
GLCI Serial Data Output
This is the differential output for GLCI (PHY to MAC).
Crystal Oscillator
An external 25 MHz crystal can be connected to these pins to
generate a 25 MHz reference clock. A 25 MHz reference clock
can also be generated from an external 1.4 V oscillator
connected to the XTAL1 input pin.
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