82567 Datasheet, PDF(27/33 Page) Intel Corporation – GbE Physical Layer Transceiver (PHY)

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82567 Datasheet, PDF (27/33 Pages) Intel Corporation – GbE Physical Layer Transceiver (PHY)

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Datasheetâ82567

4.7.6

Power Sequencing

For proper and safe operation, the power supplies must follow the following rule:

VDDO (3.3 V) > AVDD (1.8 V or 1.9 V) > DVDD (1.05 V)

This means that VDDO must start ramping before AVDD and DVDD, but DVDD may

reach its nominal operating range before AVDD and VDDO.

Basically, the higher voltages must be greater than or equal to the lower voltages. This

is necessary to avoid low impedance paths through clamping diodes and to eliminate

back-powering.

The same requirements apply to the power-down sequence.

LAN_RST# must be low throughout the time that the power supplies are ramping. This

will guarantee that the MAC and PHY reset cleanly. While LAN_RST# is low, PHYRST#

will also be asserted to reset the PHY.

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