BX80557430SL9XN Datasheet, PDF (30/100 Pages) Intel Corporation – Intel® Celeron® Processor 400 Series

Electrical Specifications
2.8.4 BCLK[1:0] Specifications (CK505 based Platforms)
Table 17.
Figure 3.
Front Side Bus Differential BCLK Specifications
Symbol
Parameter
Min Typ
V_L
V_H
V_CROSS(abs)
V_CROSS
V_OS
V_US
V_SWING
I_LI
Cpad
Input Low Voltage
Input High Voltage
Absolute Crossing Point
Range of Crossing Points
Overshoot
Undershoot
Differential Output Swing
Input Leakage Current
Pad Capacitance
-0.30 N/A
N/A
N/A
0.300 N/A
N/A
N/A
N/A
N/A
-0.300 N/A
0.300 N/A
-5
N/A
.95
1.2
Max
N/A
1.15
0.550
0.140
1.4
N/A
N/A
5
1.45
Unit Figure Notes¹
V
3
4
V
3
4
V
3, 4
2,4,6
V
3, 4
-
V
3
5
V
3
5
V
5
6
A
pF
8
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Crossing voltage is defined as the instantaneous voltage value when the rising edge of
BCLK0 equals the falling edge of BCLK1.
3.
V_Havg is the statistical average of the V_H measured by the oscilloscope.
4.
"Steady state" voltage, not including overshoot or undershoot.
5.
Overshoot is defined as the absolute value of the maximum voltage. Undershoot is defined
as the absolute value of the minimum voltage.
6.
Measurement taken from differential waveform.
7.
The crossing point must meet the absolute and relative crossing point specifications
simultaneously.
8.
Cpad includes die capacitance only. No package parasitics are included.
Differential Clock Waveform
CLK 0
V_CROSS
Median + 75 mV
V_CROSS
V ^median
CROSS
Median - 75 mV
CLK 1
VCROSS Max
500 mV
VCROSS Min
300 mV
High Time
Low Time
Period
V_CROSS
median
30
Datasheet