BX80557430SL9XN Datasheet, PDF (27/100 Pages) Intel Corporation – Intel® Celeron® Processor 400 Series

Electrical Specifications
2.7.3.1
Table 14.
GTL+ Front Side Bus Specifications
In most cases, termination resistors are not required as these are integrated into the
processor silicon. See Table 9 for details on which GTL+ signals do not include on-die
termination.
Valid high and low levels are determined by the input buffers by comparing with a
reference voltage called GTLREF. Table 14 lists the GTLREF specifications for both
50 Ohm and 60 Ohm platforms. The GTL+ reference voltage (GTLREF) should be
generated on the system board using high precision voltage divider circuits.
GTL+ Bus Voltage Definitions
Symbol
Parameter
GTLREF_PU GTLREF pull up resistor
GTLREF_PD GTLREF pull down resistor
R_TT
COMP[3:0]
Termination Resistance
60 Platform termination
Resistance
50 Platform termination
Resistance
COMP8
60 Platform termination
Resistance
50 Platform termination
Resistance
Min
124 * 0.99
210 * 0.99
45
Typ
124
210
50
Max
Units Notes¹
124 * 1.01
210 * 1.01
2, 4
55
3
60.4 * 0.99 60.4 60.4 * 1.01
4
49.9 * 0.99 49.9 49.9 * 1.01
4
30.1 * 0.99 30.1 30.1 * 1.01
4
24.9 * 0.99 24.9 24.9 * 1.01
4
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
GTLREF is to be generated from V_TT by a voltage divider of 1% resistors (one divider for
each GTLEREF land).
3.
R_TT is the on-die termination resistance measured at V_TT/3 of the GTL+ output driver.
4.
COMP resistance must be provided on the system board with 1% resistors. COMP[3:0] and
COMP8 resistors are to V_SS.
Datasheet
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