BX80557430SL9XN Datasheet, PDF (19/100 Pages) Intel Corporation – Intel® Celeron® Processor 400 Series

Electrical Specifications
2.6.2 DC Voltage and Current Specification
Table 5.
Voltage and Current Specifications
Symbol
Parameter
Min
Typ
Max Unit Notes^{2, 15}
VID Range
VID
1.0000 — 1.3375 V 3
Processor Number Core V_CC
450
2.2 GHz
V_CC
440
2.0 GHz
Refer to Table 6 and
Figure 1
V 4, 5, 6
430
1.8 GHz
420
1.6 GHz
V_{CC_BOOT}
V_CCPLL
I_CC
Default V_CC voltage for initial power up
PLL V_CC
Processor Number I_CC for
775_VR_CONFIG_06
450
2.2 GHz
440
2.0 GHz
430
1.8 GHz
420
1.6 GHz
—
1.10
—
V
- 5% 1.50 + 5%
35
—
—
35
A7
35
35
FSB termination voltage
V_TT
(DC + AC specifications)
1.14 1.20 1.26
V8
VTT_OUT_LEFT
and
DC Current that may be drawn from
VTT_OUT_RIGHT VTT_OUT_LEFT and VTT_OUT_RIGHT per pin
—
I_CC
I_TT
I_CC for V_TT supply before V_CC stable
—
I_CC for V_TT supply after V_CC stable
I_{CC_VCCPLL}
I_CC for PLL land
—
I_{CC_GTLREF}
I_CC for GTLREF
—
—
580
mA 9
4.5
—
A 10
4.6
—
130
mA
—
200
A
NOTES:
1.
Unless otherwise noted, all specification in this table are based on estimates and
simulation or empirical data. These specifications will be updated with characterized data
from silicon measurements at a later date.
2.
Adherence to the voltage specification for the processor are required to ensure reliable
processor operation.
3.
Each processor is programmed with a maximum valid voltage identification value (VID),
which is set at manufacturing and can not be altered. Individual maximum VID values are
calibrated during manufacturing such that two processors at the same frequency may have
different settings within the VID range. Please note this differs from the VID employed by
the processor during a power management event (Thermal Monitor 2).
4.
These voltages are targets only. A variable voltage source should exist on systems in the
event that a different voltage is required. See Section 2.3 and Table 2 for more
information.
5.
The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE
lands at the socket with a 100 MHz bandwidth oscilloscope, 1.5 pF maximum probe
capacitance, and 1 M minimum impedance. The maximum length of ground wire on the
probe should be less than 5 mm. Ensure external noise from the system is not coupled into
the oscilloscope probe.
6.
Refer to Table 6 and Figure 1 for the minimum, typical, and maximum V_CC allowed for a
given current. The processor should not be subjected to any V_CC and I_CC combination
wherein V_CC exceeds V_{CC_MAX} for a given current.
7.
I_{CC_MAX} specification is based on the V_{CC_MAX} loadline. Refer to Figure 1f or details.
Datasheet
19