BX80557430SL9XN Datasheet, PDF (25/100 Pages) Intel Corporation – Intel® Celeron® Processor 400 Series

Electrical Specifications
2.7.2
2.7.3
Table 11.
Table 12.
CMOS and Open Drain Signals
Legacy input signals such as A20M#, IGNNE#, INIT#, SMI#, and STPCLK# use CMOS
input buffers. All of the CMOS and Open Drain signals are required to be asserted/de-
asserted for at least four BCLKs for the processor to recognize the proper signal state.
See Section 2.7.3 for the DC specifications. See Section 6.2 for additional timing
requirements for entering and leaving the low power states.
Processor DC Specifications
The processor DC specifications in this section are defined at the processor
core (pads) unless otherwise stated. All specifications apply to all frequencies
and cache sizes unless otherwise stated.
GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit Notes¹
V_IL
V_IH
V_OH
I_OL
I_LI
I_LO
R_ON
Input Low Voltage
-0.10
GTLREF – 0.10
V
Input High Voltage
Output High Voltage
Output Low Current
Input Leakage Current
GTLREF + 0.10
V_TT + 0.10
V
V_TT – 0.10
V_TT
V
N/A
V_{TT_MAX}/
[(R_{TT_MIN})+(R_{ON_MIN})]
A
N/A
± 100
µA
Output Leakage Current
N/A
± 100
µA
Buffer On Resistance
10
13
2, 5
3, 4, 5
4, 5
-
6
7
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V_IL is defined as the voltage range at a receiving agent that will be interpreted as a logical
low value.
3.
V_IH is defined as the voltage range at a receiving agent that will be interpreted as a logical
high value.
4.
V_IH and V_OH may experience excursions above V_TT. However, input signal drivers must
comply with the signal quality specifications.
5.
The V_TT referred to in these specifications is the instantaneous V_TT.
6.
Leakage to V_SS with land held at V_TT.
7.
Leakage to V_TT with land held at 300 mV.
Open Drain and TAP Output Signal Group DC Specifications
Symbol
Parameter
Min
Max
V_OL Output Low Voltage
I_OL
Output Low Current
I_LO
Output Leakage Current
0
0.20
16
50
N/A
± 200
Unit Notes¹
V
-
mA
2
µA
3
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Measured at V_TT * 0.2.
3.
For Vin between 0 and V_OH
Datasheet
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