IA80C152 Datasheet, PDF (7/32 Pages) InnovASIC, Inc – UNIVERSAL COMMUNICATIONS CONTROLLER

Page 7 of 32
IA80C152
Preliminary Data Sheet
UNIVERSAL COMMUNICATIONS CONTROLLER
FFFFH
C000H
8000H
FFH
Upper 128
Bytes
4000H
80H
7FH
Lower 128
Bytes
0000H
00H
External RAM
Internal RAM
Figure 5 - Memory Space
SFR Space
Version
JA, JC
JB, JD
Table 3 - Summary of Program Memory Fetches
Fetch Control
Fetch Signal
EBEN EA Fetch Ports PSEN EPSEN Memory Space
N/A 0 or 1 P0, P2
Active
-
0h - FFFFh
0
0
P0, P2
Active
-
0h - FFFFh
1
0
P5, P6
- Active 0h - FFFFh
1
1
P5, P6
- Active 0h - 1FFFh
P0, P2
Active
-
2000h - FFFFh
Summary of the 80C152 Registers and Interrupts
The 80C152 combines the register set of the 8051BH and additional SFRs for the DMA and GSC
functions. Likewise, the 80C152 combines the interrupts of the 8051BH and the interrupts
required by the DMA and GSC. Table 4 contains a summary of the 80C152 registers, and table 5
contains a summary of the 80C152 interrupts.
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innovASIC
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