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IA80C152 Datasheet, PDF (5/32 Pages) InnovASIC, Inc – UNIVERSAL COMMUNICATIONS CONTROLLER
Page 5 of 32
IA80C152
Preliminary Data Sheet
UNIVERSAL COMMUNICATIONS CONTROLLER
I/O Signal Description
Table 2 below describes the I/O characteristics for each signal on the IC. The signal names
correspond to the signal names on the pinout diagrams provided above. (!) Denotes active Low.
!EA
!EPSEN
!PSEN
!RESET
ALE
EBEN
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Signal Name
Table 2 - I/O Signal Descriptions
Description
External Access enable. Since there is no internal ROM in the
80C152, this signal has no function in the JA and JC versions. For
the JB and JD versions, controls program memory fetch locations.
E-bus Program Store ENable. When EBEN is 1, this signal is the
read strobe for external program memory.
Program Store ENable. When EBEN is 0, this signal is the read
strobe for external program memory.
Reset. When this signal is low for 3 machine cycles, the device is put
into reset. The GSC may continue transmitting after reset is applied.
An internal pull-up allow the use of an external capacitor to generate
a power-on reset.
Address Latch Enable. Latches the low-byte of external memory.
E-Bus ENable. In conjunction with EA, EBEN designates program
memory fetches from either Port 0,2 or Port 5,6.
Port 0 - open drain 8-bit bi-directional port that bit addressable and
can drive up to 8 LS TTL inputs. The port signals can be used as
high impedance inputs.
This port also provides the low-byte of the multiplexed address and
data bus depending on the state of !EBEN.
P1.0 - GRXD, GSC Receive
P1.1 - GTXD, GSC Transmit
P1.2 - !DEN, Driver Enable
P1.3 - !TXC, External Transmit Clock
P1.4 - !RXC, External Receive Clock
P1.5 - !HLD, DMA Hold
P1.6 - !HLDA, DMA Hold Acknowledge
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0 - RXD, UART Receive
P3.1 - TXD, UART Transmit
P3.2 - !INT0, External Interrupt 0
P3.3 - !INT1, External Interrupt 1
P3.4 - T0, Timer 0 External Input
P3.5 - T1, Timer 1 External Input
P3.6 - !WR, External Data Memory Write Strobe
P3.7 - !RD, External Data Memory Read Strobe
P4.0
P4.1
P4.2
Port 1 - 8-bit bi-directional port that is bit addressable. To use a port
signal as an input, write a 1 to the port location. Internal pull-ups pull
the input high and source current when the input is driven low. To
use a port signal as an output, a 1 or 0 written to the port location is
presented at the output.
Port signals in this port also serve as I/O for 80C152 functions.
These I/O signals are defined next to the port name.
Port 2 - 8-bit bi-directional port that is bit addressable. To use a port
signal as an input, write a 1 to the port location. Internal pull-ups pull
the input high and source current when the input is driven low. To
use a port signal as an output, a 1 or 0 written to the port location is
presented at the output.
This port also provides the high-byte of the multiplexed address and
data bus depending on the state of !EBEN.
Port 3 - 8-bit bi-directional port that is bit addressable. To use a port
signal as an input, write a 1 to the port location. Internal pull-ups pull
the input high and source current when the input is driven low. To
use a port signal as an output, a 1 or 0 written to the port location is
presented at the output.
Port signals in this port also serve as I/O for 80C152 functions.
These I/O signals are defined next to the port name.
Port 4 - 8-bit bi-directional port that is bit addressable. To use a port
signal as an input, write a 1 to the port location. Internal pull-ups pull
the input high and source current when the input is driven low. To
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