TDA5250D2_07 Datasheet, PDF (93/94 Pages) Infineon Technologies AG – ASK/FSK 868MHz Wireless Transceiver

TDA5250 D2
Version 1.7
List of Figures
Figure 3-25
Figure 3-26
Figure 3-27
Figure 3-28
Figure 3-29
Figure 3-30
Figure 3-31
Figure 3-32
Figure 3-33
Figure 3-34
Figure 3-35
Figure 3-36
Figure 3-37
Figure 3-38
Figure 3-39
Figure 3-40
Figure 4-1
Figure 4-2
Figure 4-3
Figure 4-4
Slicer Level using RC Integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 65
Slicer Level using Peak Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . page 66
Peak Detector timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 66
Peak Detector as analog Buffer (v=1) . . . . . . . . . . . . . . . . . . . . . . . . page 67
Peak detector - power down mode . . . . . . . . . . . . . . . . . . . . . . . . . . page 68
Power down mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 68
Frequency Detection timing in continuous mode . . . . . . . . . . . . . . . page 69
Frequency Detection timing in Single Shot mode . . . . . . . . . . . . . . . page 69
Window Counter timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 70
Example for transmitted Data-structure. . . . . . . . . . . . . . . . . . . . . . . page 72
3 possible timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 73
BER Test Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 74
Temperature Behaviour. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 75
BER supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 76
Datarates and Sensitivity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 77
BER Frequency Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 77
I2C Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 83
3-wire Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 83
Schematic of the Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . page 86
Layout of the Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 87
Data Sheet
93
2007-02-26