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TDA5250D2_07 Datasheet, PDF (67/94 Pages) Infineon Technologies AG – ASK/FSK 868MHz Wireless Transceiver
TDA5250 D2
Version 1.7
Application
Component calculation: (rule of thumb)
C p ≥ 2 ⋅ TL1
100kΩ
C n ≥ 2 ⋅ TL2
100kΩ
TL1 – longest period of no signal change (LOW signal)
[3 – 34]
TL2 – longest period of no signal change (HIGH signal) [3 – 35]
3.6.3 Peak Detector - Analog output signal
The TDA5250 data output can be digital (pin 28) or in analog form by using the peak detector output
and changing some settings.
To get an analog data output the slicer must be set to lowpass mode (Reg. 0, D15 = LP = 0) and
the peak detector capacitor at pin 12 or 13 has to be changed to a resistor of about 47kOhm.
Figure 3-28 Peak Detector as analog Buffer (v=1)
3.6.4 Peak Detector – Power Down Mode
PkD_analog.wmf
For a safe and fast threshold value generation the peak detector is turned on by the sequencer
circuit (see Section 2.4.18) only after the entire receiving path is active.
In the off state the output of the positive peak detector is tied down to GND and the output of the
negative peak detector is pulled up to VCC.
Data Sheet
67
2007-02-26