PTFA191001E Datasheet, PDF (9/11 Pages) Infineon Technologies AG – Thermally-Enhanced High Power RF LDMOS FETs 100 W, 1930-1990 MHz

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Package Outline Specifications
Package H-36248-2
PTFA191001E
PTFA191001F
(45° X 2.72
[.107])
CL
D
2X 4.83±0.51
[.190±.020]
S
FLANGE 9.78
[.385] _{LID 9.40 +–00..1150 CL}
19.43 ±0.51
[.765±.020]
[.370 ^{+–..000064} ]
G
2X 12.70
[.500]
27.94
[1.100]
2X R1.63
[.064]
4X R1.52
[.060]
0.0381 [.0015]
1.02
[.040]
19.81±0.20
[.780±.008]
CL
SPH 1.57
[.062]
3.61±0.38
[.142±.015]
-A-
34.04
[1.340]
Diagram Notes—unless otherwise specified:
248-cases: h-30248-2_po
1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001].
2. All tolerances ± 0.127 [.005] unless specified otherwise.
3. Pins: D = drain, S = source, G = gate.
4. Interpret dimensions and tolerances per ASME Y14.5M-1994.
5. Primary dimensions are mm. Alternate dimensions are inches.
6. Gold plating thickness, Package H-36248-2:
S, D, G - flange & leads: 1.14 micron ± 0.38 micron [45 microinch ± 15 microinch]
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Data Sheet
9 of 11
Rev. 04, 2007-10-31