HYB39S64160BT-8 Datasheet, PDF (6/53 Pages) Infineon Technologies AG – 64-MBit Synchronous DRAM

HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Column Address
Counter
Column Addresses
A0 - A7, AP,
BA0, BA1
Column Address
Buffer
Row Addresses
A0 - A11,
BA0, BA1
Row Address
Buffer
Refresh Counter
Row
Decoder
Memory
Array
Bank 0
4096 x 256
x 16 Bit
Row
Decoder
Memory
Array
Bank 1
4096 x 256
x 16 Bit
Row
Decoder
Memory
Array
Bank 2
4096 x 256
x 16 Bit
Row
Decoder
Memory
Array
Bank 3
4096 x 256
x 16 Bit
Input Buffer Output Buffer
DQ0 - DQ15
Block Diagram: 4 Bank × 1M × 16 SDRAM
Control Logic &
Timing Generator
SPB04120
Data Book
6
12.99