HYB39S64160BT-8 Datasheet, PDF (25/53 Pages) Infineon Technologies AG – 64-MBit Synchronous DRAM

HYB39S64400/800/160BT(L)
64MBit Synchronous DRAM
4 2. Minimum Read to Write Interval
(Burst Length = 4, CAS latency = 2)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
DQM
Command NOP
CAS
latency = 2
t _CK2, DQ’s
t _DQW
t _DQZ
1 Clk Interval
NOP
Bank A
Activate
NOP Read A Write A NOP
NOP
NOP
Must be Hi-Z before
the Write Command
DIN A0
DIN A1
DIN A2
DIN A3
"H" or "L"
SPT03939
4. 3. Non-Minimum Read to Write Interval
(Burst Length = 4, CAS latency = 2, 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
DQM
t _DQW
t _DQZ
Command NOP Read A NOP NOP Read A NOP Write B NOP NOP
CAS
latency = 2
t _CK2, DQ’s
Must be Hi-Z before
the Write Command
DOUT A0 DOUT A1
DIN B0
DIN B1
DIN B2
CAS
latency = 3
t _CK3, DQ’s
DOUT A0
DIN B0 DIN B1 DIN B2
"H" or "L"
SPT03940
Semiconductor Group
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