XC2734X Datasheet, PDF (51/106 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2734X
XC2000 Family / Value Line
Functional Description
MultiCAN Features
• CAN functionality conforming to CAN specification V2.0 B active for each CAN node
(compliant to ISO 11898)
• Independent CAN nodes
• Set of independent message objects (shared by the CAN nodes)
• Dedicated control registers for each CAN node
• Data transfer rate up to 1 Mbit/s, individually programmable for each node
• Flexible and powerful message transfer control and error handling capabilities
• Full-CAN functionality for message objects:
– Can be assigned to one of the CAN nodes
– Configurable as transmit or receive objects, or as message buffer FIFO
– Handle 11-bit or 29-bit identifiers with programmable acceptance mask for filtering
– Remote Monitoring Mode, and frame counter for monitoring
• Automatic Gateway Mode support
• 16 individually programmable interrupt nodes
• Analyzer mode for CAN bus monitoring
3.14
System Timer
The System Timer consists of a programmable prescaler and two concatenated timers
(10 bits and 6 bits). Both timers can generate interrupt requests. The clock source can
be selected and the timers can also run during power reduction modes.
Therefore, the System Timer enables the software to maintain the current time for
scheduling functions or for the implementation of a clock.
3.15
Watchdog Timer
The Watchdog Timer is one of the fail-safe mechanisms which have been implemented
to prevent the controller from malfunctioning for longer periods of time.
The Watchdog Timer is always enabled after an application reset of the chip. It can be
disabled and enabled at any time by executing the instructions DISWDT and ENWDT
respectively. The software has to service the Watchdog Timer before it overflows. If this
is not the case because of a hardware or software failure, the Watchdog Timer
overflows, generating a prewarning interrupt and then a reset request.
The Watchdog Timer is a 16-bit timer clocked with the system clock divided by 16,384
or 256. The Watchdog Timer register is set to a prespecified reload value (stored in
WDTREL) in order to allow further variation of the monitored time interval. Each time it
is serviced by the application software, the Watchdog Timer is reloaded and the
prescaler is cleared.
Time intervals between 3.2 μs and 13.4 s can be monitored (@ 80 MHz).
The default Watchdog Timer interval after power-up is 6.5 ms (@ 10 MHz).
Data Sheet
51
V1.3, 2010-04