XC2734X Datasheet, PDF (10/106 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2734X
XC2000 Family / Value Line
Summary of Features
1.2
Definition of Feature Variants
The XC2734X types are offered with several Flash memory sizes. Table 2 and Table 3
describe the location of the available Flash memory.
Table 2
Continuous Flash Memory Ranges
Total Flash Size
1st Range¹⁾
2nd Range
3rd Range
320 Kbytes
C0’0000_H …
C1’0000_H …
n.a.
C0’EFFF_H
C4’FFFF_H
1) The uppermost 4-Kbyte sector of the first Flash segment is reserved for internal use (C0’F000_H to C0’FFFF_H).
Table 3
Flash Memory Module Allocation (in Kbytes)
Total Flash Size
Flash 0¹⁾
Flash 1
320
256
64
1) The uppermost 4-Kbyte sector of the first Flash segment is reserved for internal use (C0’F000_H to C0’FFFF_H).
The XC2734X types are offered with different interface options. Table 4 lists the
available channels for each option.
Table 4
Interface Channel Association
Total Number
Available Channels / Message Objects
7 ADC0 channels
CH0, CH2, Ch4, CH8, CH10, CH13, CH15
2 ADC1 channels
CH0, CH4
2 CAN nodes
CAN0, CAN1
64 message objects
4 serial channels
U0C0, U0C1, U1C0, U1C1
The XC2734X types are offered with several SRAM memory sizes. Figure 1 shows the
allocation rules for PSRAM and DSRAM. Note that the rules differ:
• PSRAM allocation starts from the lower address
• DSRAM allocation starts from the higher address
For example 8 Kbytes of PSRAM will be allocated at E0’0000h-E0’1FFFh and 8 Kbytes
of DSRAM will be at 00’C000h-00’DFFFh.
Data Sheet
10
V1.3, 2010-04