C868 Datasheet, PDF (49/82 Pages) Infineon Technologies AG – 8-Bit Single-Chip Microcontroller

C868
Hall Sensor Mode
In Brushless-DC motors the next multi-channel state values depend on the pattern of
the Hall inputs. There is a strong correlation between the Hall pattern (CURH) and the
modulation pattern (MCMP). Because of different machine types the modulation
pattern for driving the motor can be different. Therefore it is wishful to have a wide
flexibility in defining the correlation between the Hall pattern and the corresponding
modulation pattern. The CCU6 offers this by having a register which contains the actual
Hall pattern (CURHS), the next expected Hall pattern (EXPHS) and its output pattern
(MCMPS). At every correct Hall event (CHE, see figure Hall Event Actions) a new Hall
pattern with its corresponding output pattern can be loaded (from a predefined table) by
software into the register MCMOUTS. Loading this shadow register can also be done by
a write action on MCMOUTS with bit STRHP = ’1’
The sampling of the Hall pattern (on CCPOSx) is done with the T12 clock. By using the
dead-time counter DTC0 (mode MSEL6x= ’1000’) a hardware noise filter can be
implemented to suppress spikes on the Hall inputs due to high di/dt in rugged inverter
environment. In case of a Hall event the DTC0 is reloaded and starts counting. When the
counter value of one is reached, the CCPOSx inputs are sampled (without noise and
spikes) and are compared to the current Hall pattern (CURH) and to the expected Hall
pattern (EXPH). If the sampled pattern equals to the current pattern the edge on
CCPOSx was due to a noise spike and no action will be triggered (implicit noise filter). If
the sampled pattern equals to the next expected pattern the edge on CCPOSx was a
correct Hall event, the bit CHE is set which causes an interrupt and the resets T12 (for
speed measurement, see description mode ’1000’ below).
This correct Hall event can be used as a transfer request event for register MCMOUTS.
The transfer from MCMOUTS to MCMOUT transfers the new CURH-pattern as well as
the next EXPH-pattern. In case of the sampled Hall inputs were neither the current nor
the expected Hall pattern, the bit WHE (wrong Hall event) is set which also can cause
an interrupt and sets the IDLE mode clearing MCMP (modulation outputs are inactive).
To restart from IDLE the transfer request of MCMOUTS have to be initiated by software
(bit STRHP and bitfields SWSEL/SWSYN).
Data Sheet
49
V 1.0, 2003-05