C166SV2 Datasheet, PDF (427/438 Pages) Infineon Technologies AG – 16-Bit Microcontroller

User Manual
C166S V2
Summary of CPU/Subsystem Registers
Table 9-5 Register Overview Interrupt and PEC: Ordered by Name (cont’d)
Name
Physical 8-bit
Description
Address Address
Reset
Value
PECC5
FECA_H 65_H
PECC6
FECC_H 66_H
PECC7
FECE_H 67_H
PECISNC b FFA8_H D4_H
PECSEG0
EC80_H --
PECSEG1
EC82_H --
PECSEG2
EC84_H --
PECSEG3
EC86_H --
PECSEG4
EC88_H --
PECSEG5
EC8A_H --
PECSEG6 EC8C --
PEC Channel 5 Control Register
0000_H
PEC Channel 6 Control Register
0000_H
PEC Channel 7 Control Register
0000_H
PEC Interrupt Subnode Control Reg. 0000_H
PEC Pointer 0 Segment Address Reg. 0000_H
PEC Pointer 1 Segment Address Reg. 0000_H
PEC Pointer 2 Segment Address Reg. 0000_H
PEC Pointer 3 Segment Address Reg. 0000_H
PEC Pointer 4 Segment Address Reg. 0000_H
PEC Pointer 5 Segment Address Reg. 0000_H
PEC Pointer 6 Segment Address Reg. 0000
PECSEG7 EC8E --
PEC Pointer 7 Segment Address Reg. 0000
SRCP0
EC40
--
PEC Channel 0 Source Pointer
0000
SRCP1
EC44
--
PEC Channel 1 Source Pointer
0000
SRCP2
EC48
--
PEC Channel 2 Source Pointer
0000
SRCP3
EC4C --
PEC Channel 3 Source Pointer
0000
SRCP4
EC50
--
PEC Channel 4 Source Pointer
0000
SRCP5
EC54
--
PEC Channel 5 Source Pointer
0000
SRCP6
EC58
--
PEC Channel 6 Source Pointer
0000
SRCP7
EC5C --
PEC Channel 7 Source Pointer
0000
1) _{The implementation and assignment of these Interrupt Control Registers are product specific.}
9.3.2 Ordered by Address
Table 9-6 lists all xSFRs that are implemented in the C166S V2 Interrupt and Peripheral
Event Controller ordered by address.
Bit addressable SFRs are marked with the letter “b” in the “Name” column.
SFRs within the Extended SFR-Space (ESFRs) are marked with the letter “E” in the
“8-Bit Address” column.
User Manual
9-427
V 1.7, 2001-01