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C164CM_2 Datasheet, PDF (412/470 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller
SYSCON3
System Control Reg.3
ESFR (F1D4H/EAH)
15 14 13 12 11 10 9 8 7 6 5
PCD
DIS
-
CAN1
DIS
-
-
-
-
CC6 CC2
DIS DIS
-
-
rw - rw - - - - rw rw - -
C164CM/C164SM
Derivatives
Power Management
Reset Value: 0000H
43210
-
GPT
DIS
SSC
DIS
ASC
0
DIS
ADC
DIS
- rw rw rw rw
Bit
Function (associated peripheral module)
ADCDIS
Analog/Digital Converter
ASC0DIS USART ASC0
SSCDIS
Synchronous Serial Channel SSC
GPTDIS
General Purpose Timer Blocks
CC2DIS
CAPCOM2 Unit
CC6DIS
CAN1DIS
CAPCOM6 Unit
On-chip CAN Module 11)
PCDDIS
Peripheral Clock Driver (also X-Peripherals)
1) When bit CAN1DIS is cleared the CAN module is re-activated by an internal reset signal and must then be re-
configured in order to operate properly.
Note: The allocation of peripheral disable bits within register SYSCON3 is device
specific and may be different in derivatives other than the C164CM.
SYSCON3 is write protected after the execution of EINIT unless it is released via
the unlock sequence (see Table 21-6).
When disabling the peripheral clock driver (PCD), the following details should be taken
into account:
• The clock signal for all connected peripherals is stopped. Make sure that all
peripherals enter a safe state before disabling PCD.
• The output signal CLKOUT will remain HIGH (FOUT will keep on toggling).
• Interrupt requests will still be recognized even while PCD is disabled.
• No new output values are gated from the port output latches to the output port pins
and no new input values are latched from the input port pins.
• No register access is possible for generic peripherals
(register access is possible for individually disabled generic peripherals,
no register access is possible for disabled X-Peripherals).
User’s Manual
21-16
V1.0, 2002-02