C164CM_2 Datasheet, PDF (174/470 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller

C164CM/C164SM
Derivatives
External Bus Interface
Demultiplexed Bus Modes
In the demultiplexed bus modes, the 16-bit intra-segment address is permanently output
on PORT1 and the data uses PORT0 (16-bit data) or P0L (8-bit data). No address
latches are required.
The EBC initiates an external access by placing an address on the address bus. After a
programmable period of time, the EBC activates the respective command signal (RD,
WR). Data is driven onto the data bus either by the EBC (for write cycles) or by the
external memory/peripheral (for read cycles). After a period of time determined by the
access time of the memory/peripheral, data become valid.
Read cycles: Input data is latched and the command signal is now deactivated. This
causes the accessed device to remove its data from the data bus which is then tri-stated
again.
Write cycles: The command signal is now deactivated. If a subsequent external bus
cycle is required, the EBC places the respective address on the address bus. The data
remain valid on the bus until the next external bus cycle is started.
Address (P1)
ALE
BUS (P0)
RD
Bus Cycle
Address
Data/Instr.
BUS (P0)
Data
WR
Figure 9-3 Demultiplexed Bus Cycle
MCD02061M
User’s Manual
9-5
V1.0, 2002-02