C164CM_2 Datasheet, PDF (291/470 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller

C164CM/C164SM
Derivatives
Capture/Compare Unit CAPCOM6
The three 16-bit capture/compare channels are driven via timer T12 and each can
control two output lines (see Port Control Logic). The offset register T12OF (full function
module only) allows shifting of the switching points of the COUT6x output line of each
channel by shifting the respective compare value.
The 10-bit compare channel is driven via timer T13 and can control one output line.
Additional control logic allows the capture/compare channel outputs to be combined with
the compare channel output or with external signals. Thus flexible and complex output
patterns can be generated automatically, with very little or no CPU action.
Period Register
T12P
Offset Register
T12OF
f_CPU
Compare
Timer T12
16-Bit
Control Register
CTCON
Mode
Select Register
CC6MSEL
CC Channel 0
CC60
CC Channel 1
CC61
CC Channel 2
CC62
Trap Register
Port
Control
Logic
CTRAP
CC60
COUT60
CC61
COUT61
CC62
COUT62
f_CPU
Compare
Timer T13
10-Bit
Period Register
T13P
Compare Register
CMP13
Block
Commutation
Control
CC6MCON.H
COUT63
CC6POS0
CC6POS1
CC6POS2
1) _{These registers are not directly accessable.}
The period and offset registers are loading a value into the timer registers.
MCB04109
Figure 17-2 CAPCOM6 Block Diagram
Two basic operating modes are supported:
• Edge-Aligned Mode
• Center-Aligned Mode
In Edge Aligned Mode the compare timer counts up starting at 0000_H. Upon reaching
the period value stored in register TxP the timer is cleared and repeats counting up. At
this time the output signals are also switched to their passive state. Edge aligned mode
is supported by both compare timers, T12 and T13.
User’s Manual
17-2
V1.0, 2002-02