C167CR_00 Datasheet, PDF (39/464 Pages) Infineon Technologies AG – 16-Bi t Single-Chip Microcont roller

C167CR
Derivatives
Memory Organization
Note: The upper 256 Bytes of SFR area, ESFR area and internal RAM are bit-
addressable (see shaded blocks in Figure 3-3).
Code accesses are always made on even byte addresses. The highest possible code
storage location in the internal RAM is either 00’FDFE_H for single word instructions or
00’FDFC_H for double word instructions. The respective location must contain a branch
instruction (unconditional), because sequential boundary crossing from internal RAM to
the SFR area is not supported and causes erroneous results.
Any word and byte data in the internal RAM can be accessed via indirect or long 16-bit
addressing modes, if the selected DPP register points to data page 3. Any word data
access is made on an even byte address. The highest possible word data storage
location in the internal RAM is 00’FDFE_H. For PEC data transfers, the internal RAM can
be accessed independent of the contents of the DPP registers via the PEC source and
destination pointers.
The upper 256 Byte of the internal RAM (00’FD00_H through 00’FDFF_H) and the GPRs of
the current bank are provided for single bit storage, and thus they are bitaddressable.
System Stack
The system stack may be defined within the internal RAM. The size of the system stack
is controlled by bitfield STKSZ in register SYSCON (see Table 3-1).
Table 3-1 System Stack Size Encoding
<STKSZ> Stack Size (words) Internal RAM Addresses (words)
000_B
001_B
010_B
011_B
100_B
101_B
110_B
111_B
256
128
64
32
512
–
–
1024
00’FBFE_H … 00’FA00_H (Default after Reset)
00’FBFE_H … 00’FB00_H
00’FBFE_H … 00’FB80_H
00’FBFE_H … 00’FBC0_H
00’FBFE_H … 00’F800_H
Reserved. Do not use this combination.
Reserved. Do not use this combination.
00’FDFE_H … 00’F600_H (Note: No circular stack)
For all system stack operations the on-chip RAM is accessed via the Stack Pointer (SP)
register. The stack grows downward from higher towards lower RAM address locations.
Only word accesses are supported to the system stack. A stack overflow (STKOV) and
a stack underflow (STKUN) register are provided to control the lower and upper limits of
the selected stack area. These two stack boundary registers can be used not only for
protection against data destruction, but also allow to implement a circular stack with
hardware supported system stack flushing and filling (except for option ‘111’). The
technique of implementing this circular stack is described in Chapter 21.
User’s Manual
3-5
V3.1, 2000-03