TC1920 Datasheet, PDF (36/78 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1920
Preliminary
Timer Units (GPTU 0/1)
Figure 12 shows a global view of all functional blocks of one GPTU module.
C lock
C on tro l
f_GPTU
Address
Decoder
SR0
SR1
SR2
SR3
Interrupt
C on tro l
SR4
SR5
SR6
SR7
GPTU
M o d ule
(K e rn e l)
IN 0
IO 0
IN 1
IN 2
IO 1
IN 3
IN 4
IN 5
IO 2
IN 6
IN 7
IO 3
Port
O UT0 _{Control IO 4}
OUT1
OUT2
IO 5
OUT3
OUT4
OUT5
IO 6
OUT6
OUT7
IO 7
P0.0 / G PT0
P0.1 / G PT1
P0.2 / G PT2
P0.3 / G PT3
P0.4 / G PT4
P0.5 / G PT5
P0.6 / G PT6
P0.7 / G PT7
M C B05052_m odified
Figure 12 General Block Diagram of the GPTU Interface
The GPTU consists of three 32-bit timers designed to solve such application tasks as
event timing, event counting, and event recording. The GPTU communicates with the
external world via eight inputs and eight outputs.
The three timers of the GPTU module T0, T1, and T2, can operate independently from
each other, or can be combined:
General Features:
• All timers are 32-bit precision timers with a maximum input frequency of f_GPTU/2.
• Events generated in T0 or T1 can be used to trigger actions in T2
• Timer overflow or underflow in T2 can be used to clock either T0 or T1
• T0 and T1 can be concatenated to form one 64-bit timer
Features of T0 and T1:
• Each timer has a dedicated 32-bit reload register with automatic reload on overflow
• Timers can be split into individual 8-, 16-, or 24-bit timers with individual reload
registers
• Overflow signals can be selected to generate service requests, pin output signals, and
T2 trigger events
• Two input pins can determine a count option
Data Sheet
32
V 1.3, 2003-10